:::::::::::::: mapmt_fee.rlog :::::::::::::: RCS file: RCS/mapmt_fee.vhd,v Working file: mapmt_fee.vhd head: 1.5 branch: locks: strict access list: symbolic names: keyword substitution: kv total revisions: 5; selected revisions: 5 description: ---------------------------- revision 1.5 date: 2005/03/18 04:22:10; author: gvisser; state: Exp; lines: +12 -104 Updated to ISE 6.3, this uncovered a problem, tristates on d[7:0] were not driven by IOFF as intended (in prior versions too), this was fixed by inverting the polarity of the inferred flipflop signal. Cleaned up code, deleted some old commented out stuff, deleted signals no longer used. Discovered an error in gsr of signal k_reg, RHS was not a constant (this was a typo), it inferred some extra and unwanted stuff (maybe it worked, maybe it didn't) - anyway, it is corrected now. ---------------------------- revision 1.4 date: 2004/07/09 17:40:55; author: gvisser; state: Exp; lines: +29 -20 Added ramping-amplitude pulser mode (for use in ADC bit tests in automated FEE test system). Also deleted some stale/inaccurate comments and dead code. ---------------------------- revision 1.3 date: 2004/02/04 20:40:59; author: gvisser; state: Exp; lines: +5 -5 Changed d bus output keepers to pullups, to make less arbitrary readout values on dead boards. ---------------------------- revision 1.2 date: 2003/10/31 22:08:05; author: gvisser; state: Exp; lines: +55 -6 Implemented readout-trigger latency register for real (was a compiled constant before). Added version string register (same design as in rdo.vhd). ---------------------------- revision 1.1 date: 2003/10/23 22:04:03; author: gvisser; state: Exp; Initial revision ============================================================================= :::::::::::::: mapmt_system.rlog :::::::::::::: RCS file: RCS/mapmt_system.vhd,v Working file: mapmt_system.vhd head: 1.8 branch: locks: strict access list: symbolic names: keyword substitution: kv total revisions: 8; selected revisions: 8 description: ---------------------------- revision 1.8 date: 2004/02/05 01:22:28; author: gvisser; state: Exp; lines: +7 -4 Workaround for apparent problem (new to v. 5.2.03i, not in 5.2.01) in use of sliced function value. ---------------------------- revision 1.7 date: 2004/02/04 22:09:47; author: gvisser; state: Exp; lines: +5 -3 Added RHIC strobe period counter. ---------------------------- revision 1.6 date: 2004/01/02 17:18:47; author: gvisser; state: Exp; lines: +7 -7 Change of identifier from 'boxName' to 'readoutUnitId'. No functional changes. ---------------------------- revision 1.5 date: 2003/12/30 17:29:26; author: gvisser; state: Exp; lines: +8 -4 Added event log for diagnostics. ---------------------------- revision 1.4 date: 2003/10/31 18:59:36; author: gvisser; state: Exp; lines: +5 -3 Added box number register. ---------------------------- revision 1.3 date: 2003/10/28 16:25:45; author: gvisser; state: Exp; lines: +5 -3 Improved version register. ---------------------------- revision 1.2 date: 2003/10/27 21:59:02; author: gvisser; state: Exp; lines: +25 -1 Added LED-trigger latency register. Added version register. ---------------------------- revision 1.1 date: 2003/10/23 22:06:20; author: gvisser; state: Exp; Initial revision ============================================================================= :::::::::::::: rdo.rlog :::::::::::::: RCS file: RCS/rdo.vhd,v Working file: rdo.vhd head: 1.11 branch: locks: strict access list: symbolic names: keyword substitution: kv total revisions: 11; selected revisions: 11 description: ---------------------------- revision 1.11 date: 2005/03/18 03:55:08; author: gvisser; state: Exp; lines: +14 -12 Updated to ISE 6.3, this uncovered two issues - tristates on feed_a & feed_b were not driven by IOFF as intended (in prior versions too), this was fixed by inverting the polarity of the inferred flipflop signal - second, timing which was marginal now fails (appears that 6.3 does worse than 5.2), however by enabling register balancing XST fixes this automatically (and it appears to work), however we may in future want to fix it manually and disable register balancing again. Also fixed up some comments (no code changes). ---------------------------- revision 1.10 date: 2004/02/04 22:08:52; author: gvisser; state: Exp; lines: +68 -18 Added RHIC strobe period counter. Minor code clean-up. ---------------------------- revision 1.9 date: 2004/01/02 23:02:02; author: gvisser; state: Exp; lines: +27 -12 Added new flip-flops to provide equivalent of some logic signals, fixing the timing error which has been around for quite a long time. Although we did have this formal timing error, typically about 1.7 ns over a 12.5 ns budget, the design worked in practice, though obviously that's a bad thing to count on. RHIC-strobe related constraints have been tightened by an extra 10%, (formally we can have RS up to 11 MHz). ---------------------------- revision 1.8 date: 2004/01/02 17:16:37; author: gvisser; state: Exp; lines: +30 -30 Made box name and readout unit ID, aka "box number", read only and programmed through configuration memory. ---------------------------- revision 1.7 date: 2003/12/31 19:25:57; author: gvisser; state: Exp; lines: +76 -5 Added event log for system diagnostics (presently, any nonzero trigger command word (20 bits) is an event to be logged). ---------------------------- revision 1.6 date: 2003/10/31 19:26:22; author: gvisser; state: Exp; lines: +27 -16 Fixed LED-trigger register read (another bug). Added box number register (read/write for the moment, as with box name register). Cleaned up a little. ---------------------------- revision 1.5 date: 2003/10/29 00:09:39; author: gvisser; state: Exp; lines: +44 -14 Revised LED control & added manual LED control bits in CSR. Added local/TCD clock selector bit in CSR. Added structure of CSR error bits, and PLL lock error bit in particular. ---------------------------- revision 1.4 date: 2003/10/28 17:14:15; author: gvisser; state: Exp; lines: +6 -5 Improved version register. ---------------------------- revision 1.3 date: 2003/10/27 21:57:21; author: gvisser; state: Exp; lines: +51 -10 Fixed error in LED-trigger latency register (lack of DTACK). Added version register based on RCS version tag in source code. ---------------------------- revision 1.2 date: 2003/10/24 17:02:52; author: gvisser; state: Exp; lines: +47 -24 Removed trigger command kluge (was using cmd=4 for pulser trigger). Replaced fake header "abc 789" with real header - token and trigger cmd - box number to be added later. Added LED-trigger latency register and action from trigger command 9. ---------------------------- revision 1.1 date: 2003/10/23 22:01:15; author: gvisser; state: Exp; Initial revision =============================================================================