A128C Record Description

1. Introduction

 The A128C Record is in charge of the Jtag communication to the Alice128C, Costar and Connexion Board FPGA chips. One instance of this record controls one half-ladder (one side of a ladder). Concerning the costar chip, the reading/writing of its registers using the Jtag protocol is done by this record but the collected parameters are accessed through the Costar record.

2. Fields Description

Field Name
Summary
Type
Comment

VAL

Command

enum

see the list of commands below (input)

LADR

Ladder Number

short

Number of half ladder [0..39] (input)

ADRS

Ladder Address

short

Format (6 bits) : r1r2a1a2a3a4 where r1r2 : readout board number, a1a2a3a4 : adc board address (input)

BYPS

Chip Soft Bypass

string

ascii string of '0' and '1'. '1' : the chip is used, '0' : the chip is bypassed. The length of the string is the number of Alice128C chips in the whole ladder. (input)

HBYP

Chip Hard Bypass

string

Automatically updated by the record. (input)

JINI

Jtag Init

short

Internal variable. for info: 0 = not initialized,1 = init done, 2 = bias done (output)

OUTI

Output Init Link

outlink

For connection to the 'costar' record (output)

OMAP

Jtag Map Output

string

ascii string 'A' : A128C, 'C' : costar, 'X' : connexion board, 'R' : readout board. not used. (output)

DMAP

Default Jtag Map

string

For debug purpose only, do not use. (input)

BDIR

Bias Directory

string

Path to directory where the bias files are stored. (input)

BFIL

Bias File

string

File name, without the extension ( '.bias' ) (input)

PULS

Pulse Level

uchar

Internal pulse generator level. (input)

CHAN

Pulse Channel

ushort

Channel to be pulsed with internal pulse generator. (input)

SPAC

Spacing

enum

'no pulse','1 per ladder','1 per chip','2 per chip','4 per chip', or '8 per chip' (input)

TRAN

Transparent Channel

ushort

Channel to be selected in transparent mode. (input)

JCLK

JTAG Clock Frequency

ulong

in Hertz (automatically converted to the nearest possible value). (input)

LSTA

Latchup Status

short

'0' : no latchup,'1' : latchup (output)

PSTA

Power Status

ushort

not used (output)

BSTA

Bias Status

uchar

Number of wrong returned bias parameters (should be zero !) (output)

BALS

Bias Alarm Severity

severity

default : MAJOR (input)

HYBY

Hybrid Bypass

ushort

16 bits. Each bit represents one hybrid. '1' : the hybrid is used, '0' : the hybrid is bypassed (input)

FBIA

Force Bias

ushort

16 bits. Each bit represents one hybrid. '1' : force the bias loading to be done on this hybrid even if it is bypassed. '0' : do nothing. (input)

LAHY

Latchup Hybrid

ushort

16 bits. Each bit represents one hybrid. indicates which hybrid has been automatically powered off by the Connexion Board. (output)

LALS

Latchup Alarm Severity

severity

default : MINOR (input)

JFHY

JTAG Fail Hybrid

ushort

16 bits. Each bit represents one hybrid. Indicates the hybrid where the Jtag signals do not return correctly. (output)

JALS

Jtag Alarm Severity

severity

default : MAJOR (input)

HYCH

Hybrid Chip Offset

string

Internal variable.

HMAP

Hybrid Map Output

string

Not used

HYNB

Hybrid Number

ushort

Not used

CNXB

Connexion Board ?

short

Always '1' (input)

HM1

Hybrid 1 Map Output

string

ascii string 'A' : A128C, 'C' : costar, 'X' : connexion board, 'R' : readout board. (output)

HM2

Hybrid 2 Map Output

string

HM3

Hybrid 3 Map Output

string

HM4

Hybrid 4 Map Output

string

HM5

Hybrid 5 Map Output

string

HM6

Hybrid 6 Map Output

string

HM7

Hybrid 7 Map Output

string

HM8

Hybrid 8 Map Output

string

HM9

Hybrid 9 Map Output

string

HM10

Hybrid 10 Map Output

string

HM11

Hybrid 11 Map Output

string

HM12

Hybrid 12 Map Output

string

HM13

Hybrid 13 Map Output

string

HM14

Hybrid 14 Map Output

string

HM15

Hybrid 15 Map Output

string

HM16

Hybrid 16 Map Output

string

CXID

Connexion ID

uchar

ID number of the Connexion Board (output)

VREF

Latchup level

uchar

Connexion Board register (2 bits) sensitivity to latchup. (input)

3. Commands

The 'VAL' field of this record can have one of the following values :

NOP

Do nothing.

RESET

Given the JTAG frequency requested by the user, it calculates the nearest possible frequency and does a 'hard' reset (TRSTB reset).

INIT

It detects the content of the JTAG chain of each hybrid (bypassing the other hybrids) and put the result in the corresponding HM1..HM15 fields. If an hybrid does not respond correctly to the JTAG controller, the hybrid is bypassed and the information is stored in the JFHY field.

BIAS

It reads the file stored in the field BFIL, in the directory DFIL. This file contains the list of bias parameters. Then it sends them into the ALICE128C chips through the JTAG chain. For the bypassed chips the bias parameters are set to zero. Then it fills the on_off register (which powers on or off the output buffers of the chips), and the bypass register. the bypass status of the chips is in the BYPS field. The bias parameters sent back by the JTAG are stored in the DFIL directory, in a file named 'biasX.ret', (X is the ID number of the ladder). These bias parameters are compared to the bias parameters which have been sent, and the number of differences is put in the field BSTA.

After that, if the FBIA field is not null, it sends nominal bias values for the hybrid selected in this FBIA register (each of the 16 bits of this field represents one hybrid). The Jtag returned signals are ignored, this field must only be used for bad hybrid that cannot return good jtag signals.

TEST

It sets the pulse register level of all the chips according to the PULS field. Then it fills the test register according to the SPAC field. This field determines how many pulses have to be sent. There are 6 possibilities :

  • "No Pulse"
  • "1 per ladder", only one pulse on one chip.
  • "1 per chip", one pulse on all the chips.
  • "2 per chip"
  • "4 per chip"
  • "8 per chip"

The field CHAN contains the channel number of one of the channels to be pulsed.

For example if CHAN=12 and SPAC="2 per chip" , the channels 12 and 68 (12+64) will be pulsed on all the chips. The same channels will be pulsed if CHAN=68 and SPAC="2 per chip".

TRANSP

It sets the channel in the TRAN field in transparent mode.

LATCHUP

It gets from the Connection Board the hybrids which are in latchup and corrects the LAHY, OMAP, HM1, …,HM15 fields consequently.

RECOVER

Reload the bias in the hybrid which have been powered off because of latchup. After this operation the ladder should be in same good state as after the initialization. 

COSTAR

Read all the costar registers (temperature, voltage, leakage currents, ...). And set the piedestal compensation. All the read parameters are stored in a hiden table which is read by the 'Costar' records.

POW ON

Power on all the hybrids, read the 'Power Status' register of the Connexion Board and write it into the LAHY field.

POW OFF

Power off all the hybrids, read the 'Power Status' register of the Connexion Board and write it into the LAHY field.

note : after the execution of each of these commands, the 'VAL' field is set to 'NOP' if everything is ok, and to 'RESET' if something goes wrong (for example if the connection board was not detected).

 

4. Source Files

in '/star/tools/control/epics/R3.12-LBL.4/ssdApp/src/'

A128CRecord.ascii : Record fields description

jtagCommon.c, jtagCommon.h, jtagA128C.c, jtagA128C.h, jtagConnexion.c, jtagConnexion.h, jtagCostar.c, jtagCostar.h : Harware layer.

recA128C.c : Record support routines.