How to make the test bench work ? (for dummies)

28/09/2007 : first draft by vnt and stephane
03/10/2007 : updated (christophe)

1/ Electrical connection
Needed : 
- Translator Board 
- Altera BitBlaster
- PC with DIO32HS PCI board from National Instrument  
- some SSD ladders ? :-) at least one !
- 3 Power supplies : 2 with 3 outputs (+/- 2 V and + 5 Volts) plus 1 for the Translator Board (+/- 5 Volts)
- HV power supply 100 V + micro ampermeter (to check current)

See figure for the setup

2/ Software needed 
- Max + II
- Star Solw Control V6
- LabView 6.1

3/ To start

- first at all, please connect everything together ;-)
- switch LV on (for P and N side and for the Translator Board)
- Configure the FPGA :
	1/ launch Max + II (by clicking on the icon)
	2/ in the Max+plusII menu, choose Programmer
	3/ Select the configuration : [JTAG] ->[Multi-Device JTAG Chain Setup] ->[Restore JCF…] -> C:\SSD_BNL\gfpa_star\bnl.jcf
	3/ click on Configure
	4/ if everything is fine, click in OK 
Now the FPGA is loaded

- Launch SlowControl V6 by clicking in the icon
	1/ Launch : Auto : Slow Control connexion & Alice128
		a/ then click on P ON and N ON (top left) then POWER : you order the connection board (via a register in the FPGA) to turn ON the modules 
		PS : if it doesn't work, please look at the ladder address (please change the ladder address to be able to use the software)
 		b/ if everything is green, change the bias to Nominal bias (top right)
		c/ then click on Auto button
This will initializes the Alice 128 with the correct biasing current.
Also it is needed to check if the return of this initialization is good by looking at the Bias_P and Bias_N row, for each single module, the box should turn green 
If "none" then the module didn't answer correctly to the JTAG which means that this module is not ready to take data. It doesn't mean that the module is dead but that currently there is a broken connection between the JTAG loop. (If the module is forced for instance, the module can provide correct data, but this is not available in the test bench so far)
		d/ Click on Quit

	2/ Launch Auto: Costar
		a/ it allows to read and to (finer) ajust the LV power supplies of the module (read +/- 2 Volts) 
	
	3/ Launch : Control : Multiplexeur Analogique (Analog multiplexer)
		a/ Change the differential input MUX_P- reference to Analogic ground : in choix_P, click on the small arrow (red or blue) for each module and change to AGND.
Note that by default it is set to analogic output from the Costar to the -Input of the ADC. You can also set to a fixed value of +/-400mV. It is recommanded to use AGND.
		b/ click on Quit

	4/ Launch acquisition par signal test
		a/ Now look at the wonderful signal ;-)
		b/ more seriously, look at the signal : since the HV is not ON yet, there is no depletion and so the modules are very noisy, so one can observed large variations in the signal : this helps to see which modules are giving data and which one are not.
		c/ Turn ON the HV power supply and ajust it slowly from 0 Volt to 30 (or 40 Volts depending on the ladder), and one can observe a stable signal. If so : this ladder is sane.

4/ Before disconnecting the ladder, one should ajust slowly the HV to 0 Volt, then turn OFF the LV power supplies (all of them) and it is then safe to disconnect.