StRoot: StTriggerUtilities/Bemc/StBemcTriggerSimu.cxx Source File

00001 #include "BEMC_DSM_decoder.h"
00002 #include "StBemcTriggerSimu.h"
00003 
00004 //General
00005 #include "TList.h"
00006 #include "TH2.h"
00007 #include "StMessMgr.h"
00008 #include "StTriggerSimuMaker.h"
00009 
00010 //Bemc
00011 #include "StEmcUtil/database/StEmcDecoder.h"
00012 #include "StEmcUtil/geometry/StEmcGeom.h"
00013 #include "StEmcUtil/database/StBemcTables.h"
00014 #include "StEmcRawMaker/defines.h"
00015 #include "StEmcSimulatorMaker/StEmcSimulatorMaker.h"
00016 #include "StEmcADCtoEMaker/StEmcADCtoEMaker.h"
00017 #include "StBemcTriggerDbThresholds.h"
00018 
00019 //StEvent
00020 #include "St_DataSetIter.h"
00021 #include "StEvent/StEventTypes.h"
00022 
00023 //Db
00024 #include "St_db_Maker/St_db_Maker.h"
00025 
00026 // MuDst
00027 #include "StMuDSTMaker/COMMON/StMuTypes.hh"
00028 
00029 // DSM 2009 Utilities
00030 #include "StTriggerUtilities/StDSMUtilities/StDSM2009Utilities.hh"
00031 
00032 ClassImp(StBemcTriggerSimu)
00033 //==================================================
00034 //==================================================
00035 StBemcTriggerSimu::StBemcTriggerSimu()
00036 {
00037 
00038   mEvent    = NULL;
00039   mDecoder  = new StEmcDecoder();
00040   mDbThres  = new StBemcTriggerDbThresholds();
00041   mGeo      = StEmcGeom::getEmcGeom("bemc");
00042   mAdc2e    = 0;
00043   starDb    = NULL;
00044   mTables   = NULL;
00045   mHList    = NULL;
00046   mConfig   = 0;
00047   mB001     = new DSMLayer_B001_2009;
00048   mB101     = new DSMLayer_B101_2009;
00049 
00050 }
00051 //==================================================
00052 //==================================================
00053 StBemcTriggerSimu::~StBemcTriggerSimu(){ 
00054 
00055   delete mDecoder;
00056   delete mDbThres;
00057 
00058 }
00059 //==================================================
00060 //==================================================
00061 void StBemcTriggerSimu::Init(){
00062  
00063   LOG_INFO <<Form("Bemc::Init() MC_flag=%d, config: flag=%d",mMCflag, mConfig)<<endm;
00064   assert(mConfig>=kOnline);
00065   assert(mConfig<=kExpert);
00066 
00067 
00068   starDb = static_cast<St_db_Maker*> ( mHeadMaker->GetMakerInheritsFrom("St_db_Maker") );
00069   if(!starDb) {
00070     LOG_WARN << "StBemcTriggerSimu couldn't get a pointer to St_db_maker -- this means trouble" << endm;
00071   }
00072   
00073   if(mMCflag == 1) {
00074     StEmcSimulatorMaker *emcSim = static_cast<StEmcSimulatorMaker*> ( mHeadMaker->GetMakerInheritsFrom("StEmcSimulatorMaker") );
00075     if(!emcSim) {
00076       LOG_FATAL << "StBemcTriggerSimu couldn't find StEmcSimulatorMaker in chain" << endm;
00077       assert(0);
00078     }
00079     mTables = emcSim->getTables();
00080   }
00081   else {
00082     mAdc2e = static_cast<StEmcADCtoEMaker*> ( mHeadMaker->GetMakerInheritsFrom("StEmcADCtoEMaker") );
00083     if(!mAdc2e) {
00084       LOG_FATAL << "StBemcTriggerSimu couldn't find StEmcADCtoEMaker in chain" << endm;
00085       assert(0);
00086     }
00087     mTables = mAdc2e->getBemcData()->getTables();
00088   }
00089 
00090   mDbThres->LoadTimeStamps();
00091   
00092   //2005
00093   mAllTriggers.insert(96201);   //bemc-ht1-mb
00094   mAllTriggers.insert(96211);   //bemc-ht2-mb
00095   mAllTriggers.insert(96221);   //bemc-jp1-mb
00096   mAllTriggers.insert(96233);   //bemc-jp2-mb-b
00097 
00098   //2006
00099   mAllTriggers.insert(117201);  //bemc-http-mb  
00100   mAllTriggers.insert(117211);  //bemc-ht2-mb
00101   mAllTriggers.insert(117212);  //bemc-ht2-mb-emul
00102   mAllTriggers.insert(127212);  //bemc-ht2-mb-emul
00103   mAllTriggers.insert(127213);  //bemc-ht2-mb-emul
00104   mAllTriggers.insert(137213);  //bemc-ht2-mb-emul
00105   mAllTriggers.insert(117221);  //bemc-jp1-mb
00106   mAllTriggers.insert(127221);  //bemc-jp1-mb
00107   mAllTriggers.insert(137221);  //bemc-jp1-mb
00108   mAllTriggers.insert(137222);  //bemc-jp1-mb
00109   mAllTriggers.insert(117501);  //bemc-jp0-mb
00110   mAllTriggers.insert(127501);  //bemc-jp0-mb
00111   mAllTriggers.insert(137501);  //bemc-jp0-mb
00112   mAllTriggers.insert(117571);  //bemc-jp1
00113   mAllTriggers.insert(127571);  //bemc-jp1
00114   mAllTriggers.insert(137571);  //bemc-jp1
00115   mAllTriggers.insert(117575);  //bemc-jp0-etot
00116   mAllTriggers.insert(127575);  //bemc-jp0-etot
00117   mAllTriggers.insert(137575);  //bemc-jp0-etot
00118   mAllTriggers.insert(117585);  //bemc-jp2
00119   mAllTriggers.insert(127585);  //bemc-jp2
00120   mAllTriggers.insert(137585);  //bemc-jp2
00121   mAllTriggers.insert(117601);  //Upsilon
00122   mAllTriggers.insert(117602);  //Upsilon
00123   mAllTriggers.insert(137602);  //Upsilon
00124   mAllTriggers.insert(137603);  //Upsilon
00125   mAllTriggers.insert(117611);  //bemc-http-mb-l2gamma
00126   mAllTriggers.insert(127611);  //bemc-http-mb-l2gamma
00127   mAllTriggers.insert(5);       //bemc-http-mb-l2gamma
00128   mAllTriggers.insert(137611);  //bemc-http-mb-l2gamma
00129   mAllTriggers.insert(117621);  //bemc-jp0-etot-mb-l2jet
00130   mAllTriggers.insert(117622);  //bemc-jp0-etot-mb-l2jet
00131   mAllTriggers.insert(127622);  //bemc-jp0-etot-mb-l2jet
00132   mAllTriggers.insert(137622);  //bemc-jp0-etot-mb-l2jet
00133   mAllTriggers.insert(117705);  //jpsi-mb
00134   mAllTriggers.insert(137705);  //jpsi-mb
00135   mAllTriggers.insert(117821);  //bemc-http-mb-fast
00136   mAllTriggers.insert(127821);  //bemc-http-mb-fast
00137   mAllTriggers.insert(137821);  //bemc-http-mb-fast
00138   mAllTriggers.insert(137822);  //bemc-http-mb-fast
00139   mAllTriggers.insert(147570);  //bemc-jp0
00140   mAllTriggers.insert(147585);  //bemc-http
00141   mAllTriggers.insert(147611);  //bemc-http-mb-l2gamma
00142   mAllTriggers.insert(147621);  //bemc-jp0-mb-l2jet
00143   mAllTriggers.insert(147705);  //jpsi-mb
00144   
00145   //2007
00146   mAllTriggers.insert(200211);  //bht2-mb
00147   mAllTriggers.insert(200212);  //bht2-mb
00148   mAllTriggers.insert(200220);  //bht2-mb
00149   mAllTriggers.insert(200221);  //bht2-mb
00150   mAllTriggers.insert(200222);  //bht2-mb
00151   mAllTriggers.insert(200213);  //btag
00152   mAllTriggers.insert(200214);  //btag
00153   mAllTriggers.insert(200585);  //bht2
00154   mAllTriggers.insert(200586);  //bht2
00155   mAllTriggers.insert(200601);  //L2-upsilon
00156   mAllTriggers.insert(200602);  //L2-upsilon  
00157   mAllTriggers.insert(200620);  //L2-gamma
00158   mAllTriggers.insert(200621);  //L2-gamma
00159   //not implemented
00160   mAllTriggers.insert(200400); //upc
00161   mAllTriggers.insert(200401); //upc
00162   mAllTriggers.insert(200402); //upc
00163   mAllTriggers.insert(200410); //upc-jpsi
00164   mAllTriggers.insert(200411); //upc-jpsi
00165 
00166 
00167   //2008dAu
00168   mAllTriggers.insert(210500);//BEMC-HT0
00169   mAllTriggers.insert(210510);//BEMC-HT1
00170   mAllTriggers.insert(210520);//BEMC-HT2
00171   mAllTriggers.insert(210501);//BEMC-HT0
00172   mAllTriggers.insert(210511);//BEMC-HT1
00173   mAllTriggers.insert(210521);//BEMC-HT2
00174   mAllTriggers.insert(210541);//BEMC-HT4
00175   //not implemented
00176   mAllTriggers.insert(210601);//upsilon 
00177   mAllTriggers.insert(210710);//UPCjpsi
00178   mAllTriggers.insert(210800);//BEMC-HT4-fast
00179 
00180   //2008pp
00181   mAllTriggers.insert(220500);//BEMC-HT0-mb
00182   mAllTriggers.insert(220510);//BEMC-HT1-mb
00183   mAllTriggers.insert(220520);//BEMC-HT2-mb-slow
00184 
00185   //2009pp
00186   //
00187   // All the registers are now retrieved from the database in StTriggerSimuMaker.cxx
00188   // (look for the function get2009DsmRegistersFromOnlineDatabase).
00189   // This way, only one call to the database is made to get
00190   // thresholds for bemc, eemc, and emc. The old way, each
00191   // subdetector made a separate call to the database to
00192   // get its thresholds via the noew-defunct function setDsmRegisters().
00193   // This, of course, puts a lot of unecessary strain on the database.
00194   // Hence, all the register retrievals are now done in one shot
00195   // in StTriggerSimuMaker.cxx.
00196   //
00197   // The 2009 trigger IDs are handled by emc which has a TCU
00198   // emulator. Basically, trigger definitions are retrieved
00199   // from the database. Those definitions include which bits
00200   // must be on at the output of the last DSM. Triggers are
00201   // then satisfied accordingly.
00202 
00203   Clear();
00204 
00205 #ifdef DEBUG
00206   mBEMCLayer0HT6bitDiff=new TH2F("BEMCLayer0HT6bitDiff","BEMC Layer 0 HT6bit Difference",kNPatches,0,kNPatches,128,-64,64);
00207   mBEMCLayer0TP6bitDiff=new TH2F("BEMCLayer0TP6bitDiff","BEMC Layer 0 TP6bit Difference",kNPatches,0,kNPatches,128,-64,64);
00208   mBEMCLayer0HT6bit=new TH2F("BEMCLayer0HT6bit","BEMC Layer 0 HT6bit",kNPatches,0,kNPatches,32,0,32);
00209   mBEMCLayer0TP6bit=new TH2F("BEMCLayer0TP6bit","BEMC Layer 0 TP6bit",kNPatches,0,kNPatches,32,0,32);
00210   mBEMCLayer1HTBits = new TH2F("BEMCLayer1HTBits","BEMC Layer1 HT Threshold Bits", 36, 0, 36, 10, 0, 10);
00211   mBEMCLayer1HTBitsDiff = new TH2F("BEMCLayer1HTBitsDiff","BEMC Layer1 HT Threshold Bits - Simulated",36, 0, 36, 20, -10, 10);
00212   mBEMCLayer1TPBits = new TH2F("BEMCLayer1TPBits","BEMC Layer1 TP Threshold Bits", 36, 0, 36, 10, 0, 10);
00213   mBEMCLayer1TPBitsDiff = new TH2F("BEMCLayer1TPBitsDiff","BEMC Layer1 TP Threshold Bits - Simulated",36, 0, 36, 20, -10, 10);
00214   mBEMCLayer1HTTPBits = new TH2F("BEMCLayer1HTTPBits","BEMC Layer1 HT.TP Threshold Bits", 36, 0, 36, 10, 0, 10);
00215   mBEMCLayer1HTTPBitsDiff = new TH2F("BEMCLayer1HTTPBitsDiff","BEMC Layer1 HT.TP Threshold Bits - Simulated",36, 0, 36, 20, -10, 10);
00216   mBEMCLayer1PatchSum = new TH2F("BEMCLayer1PatchSum", "BEMC Layer1 Patch Sum", 36, 0, 36, 100, 0, 100);
00217   mBEMCLayer1PatchSumDiff = new TH2F("BEMCLayer1PatchSumDiff", "BEMC Layer1   Patch Sum Diff", 36, 0, 36, 200, -100, 100);
00218   mBEMCLayer1HTmaskBits = new TH2F("BEMCLayer1HTmaskBits", "BEMC Layer1 HT Mask Bits", 36, 0, 36, 8, -4, 4);
00219   mBEMCLayer1HTmaskDiff = new TH2F("BEMCLayer1HTmaskDiff", "BEMC Layer1 HT Mask Diff", 36, 0, 36, 8, -4, 4);
00220   mBEMCLayer1HTthr3Bits = new TH2F("BEMCLayer1HTthr3Bits", "BEMC Layer1 HT Thr3 Bits", 36, 0, 36, 8, -4, 4);
00221   mBEMCLayer1HTthr3Diff = new TH2F("BEMCLayer1HTthr3Diff", "BEMC Layer1 HT Thr3 Diff", 36, 0, 36, 8, -4, 4);
00222   mBEMCLayer2PatchSum = new TH2F("BEMCLayer2PatchSum", "BEMC Layer2 Patch Sum", 6, 0, 6, 100, 0, 100);
00223   mBEMCLayer2PatchSumDiff = new TH2F("BEMCLayer2PatchSumDiff", "BEMC Layer2   Patch Sum Diff", 6, 0, 6, 200, -100, 100);
00224   mBEMCLayer2HT3Bits = new TH2F("BEMCLayer2HT3Bits", "BEMC Layer2 HT3 Bits", 6, 0, 6, 4, 0, 4);
00225   mBEMCLayer2HT3BitsDiff = new TH2F("BEMCLayer2HT3BitsDiff", "BEMC Layer2 HT3 Bits", 6, 0, 6, 8, -4, 4);
00226   mBEMCLayer2HTTPBits = new TH2F("BEMCLayer2HTTPBits", "BEMC Layer2  HTTP Bits", 6, 0, 6, 4, 0, 4);
00227   mBEMCLayer2HTTPBitsDiff = new TH2F("BEMCLayer2HTTPBitsDiff", "BEMC Layer2   HTTP Bits", 6, 0, 6, 8, -4, 4);
00228   mBEMCLayer2TPBits = new TH2F("BEMCLayer2TPBits", "BEMC Layer2  TP Bits", 6, 0, 6, 4, 0, 4);
00229   mBEMCLayer2TPBitsDiff = new TH2F("BEMCLayer2TPBitsDiff", "BEMC Layer2 TP Bits", 6, 0, 6, 8, -4, 4);
00230   mBEMCLayer2JPBits = new TH2F("BEMCLayer2JPBits", "BEMC Layer2 JP Bits", 6, 0, 6, 4, 0, 4);
00231   mBEMCLayer2JPBitsDiff = new TH2F("BEMCLayer2JPBitsDiff", "BEMC Layer2 JP Bits", 6, 0, 6, 8, -4, 4);
00232   mBEMCLayer2HTj0Bits = new TH2F("BEMCLayer2HTj0Bits", "BEMC Layer2 HT_j0 Bits", 6, 0, 6, 4, 0, 4);
00233   mBEMCLayer2HTj0BitsDiff = new TH2F("BEMCLayer2HTj0BitsDiff", "BEMC Layer2 HT_j0 Patch Bits", 6, 0, 6, 8, -4, 4);
00234   mBEMCLayer2HTj1Bits = new TH2F("BEMCLayer2HTj1Bits", "BEMC Layer2 HT_j1 Bits", 6, 0, 6, 4, 0, 4);
00235   mBEMCLayer2HTj1BitsDiff = new TH2F("BEMCLayer2HTj1BitsDiff", "BEMC Layer2 HT_j1 Bits", 6, 0, 6, 8, -4, 4);
00236 
00237   mHList->Add(mBEMCLayer0HT6bit);
00238   mHList->Add(mBEMCLayer0TP6bit);
00239   mHList->Add(mBEMCLayer0HT6bitDiff);
00240   mHList->Add(mBEMCLayer0TP6bitDiff);
00241   mHList->Add(mBEMCLayer1HTBits);
00242   mHList->Add(mBEMCLayer1HTBitsDiff);
00243   mHList->Add(mBEMCLayer1TPBits);
00244   mHList->Add(mBEMCLayer1TPBitsDiff);
00245   mHList->Add(mBEMCLayer1HTTPBits);
00246   mHList->Add(mBEMCLayer1HTTPBitsDiff);
00247   mHList->Add(mBEMCLayer1PatchSum);
00248   mHList->Add(mBEMCLayer2PatchSum);
00249   mHList->Add(mBEMCLayer2HTTPBits);
00250   mHList->Add(mBEMCLayer2TPBits);
00251   mHList->Add(mBEMCLayer2HT3Bits);
00252   mHList->Add(mBEMCLayer2JPBits);
00253   mHList->Add(mBEMCLayer2HTj0Bits);
00254   mHList->Add(mBEMCLayer2HTj1Bits);
00255   mHList->Add(mBEMCLayer1PatchSumDiff);
00256   mHList->Add(mBEMCLayer1HTthr3Bits);
00257   mHList->Add(mBEMCLayer1HTthr3Diff);
00258   mHList->Add(mBEMCLayer1HTmaskBits);
00259   mHList->Add(mBEMCLayer1HTmaskDiff);
00260   mHList->Add(mBEMCLayer2PatchSumDiff);
00261   mHList->Add(mBEMCLayer2HTTPBitsDiff);
00262   mHList->Add(mBEMCLayer2TPBitsDiff);
00263   mHList->Add(mBEMCLayer2HT3BitsDiff);
00264   mHList->Add(mBEMCLayer2JPBitsDiff);
00265   mHList->Add(mBEMCLayer2HTj0BitsDiff);
00266   mHList->Add(mBEMCLayer2HTj1BitsDiff);
00267 
00268 #endif
00269 
00270 }
00271 //==================================================
00272 //==================================================
00273 void StBemcTriggerSimu::InitRun(int runnumber){
00274   LOG_DEBUG<<"StBemcTriggerSimu::InitRun() -- " << runnumber << '\t' << mHeadMaker->GetDate() << '\t' << mHeadMaker->GetTime() << endm;
00275   
00276   assert(starDb);
00277 
00278   const TDatime& dbTime = starDb->GetDBTime();
00279 
00280   timestamp = dbTime.Get();
00281   year      = dbTime.GetYear();
00282   yyyymmdd  = dbTime.GetDate(); //form of 19971224 (i.e. 24/12/1997)
00283   hhmmss    = dbTime.GetTime(); //form of 123623 (i.e. 12:36:23)
00284 
00285   mDecoder->SetDateTime(dbTime);
00286 
00287   if (year < 2009) {
00288     getTowerStatus();
00289     getDSM_TPStatus();
00290     getDSM_HTStatus();
00291     getLUT();
00292     getPed();
00293 
00294     //Get FEE window for HT from support class for offline operation
00295     //online replaced this with Db call in getPed()
00296     HT_FEE_Offset=mDbThres->GetHtFEEbitOffset(year);
00297   }
00298   else {
00299     FEEini2009(runnumber);
00300     mAllTriggers.clear();
00301   }
00302 }
00303 //==================================================
00304 //==================================================
00305 void StBemcTriggerSimu::Clear(){
00306   
00307 
00308   for (int did=1; did<=kNTowers; did++){
00309     adc08[did-1]=0;
00310     adc10[did-1]=0;
00311     adc12[did-1]=0;
00312     HT6bit_adc_holder[did-1]=0;
00313   }
00314   
00315   for (int tpid=0;tpid<kNPatches; tpid++){
00316     L0_HT_ADC[tpid]=0;
00317     L0_TP_ADC[tpid]=0;
00318     L0_TP_PED[tpid]=0;
00319     HTadc06[tpid]=0;
00320     TP6bit_adc_holder[tpid]=0;
00321   }
00322   
00323   mFiredTriggers.clear();
00324   mJpsiCandidates.clear();
00325 }
00326 //==================================================
00327 //==================================================
00328 bool StBemcTriggerSimu::isCorrupted() const {
00329   return mMCflag != 1 && mAdc2e->isCorrupted();
00330 }
00331 //==================================================
00332 //==================================================
00333 StTriggerSimuDecision StBemcTriggerSimu::triggerDecision(int trigId) {
00334   //first check if it fired
00335   for(unsigned i=0; i<mFiredTriggers.size(); i++) {
00336     if(trigId == mFiredTriggers[i]) return kYes;
00337   }
00338   
00339   //now check if we care
00340   if(mAllTriggers.find(trigId) == mAllTriggers.end()) {
00341     return kDoNotCare;
00342   }
00343   else {
00344     return kNo;
00345   }
00346 }
00347 //==================================================
00348 //==================================================
00349 void StBemcTriggerSimu::getTowerStatus(){
00350   
00351   fill(TowerStatus,TowerStatus+kNTowers,1);
00352   fill(numMaskTow,numMaskTow+kNPatches,0);
00353   
00354   if (mConfig==kOnline) {
00355     for (Int_t cr=1; cr <= kNCrates; cr++){
00356       for (Int_t ch=0; ch < kNChannels; ch++){
00357         Int_t did,tpid;
00358         mDecoder->GetTowerIdFromCrate(cr,ch,did);
00359         TowerStatus[did-1]=mTables->triggerTowerStatus(cr,ch);
00360         mDecoder->GetTriggerPatchFromTowerId(did,tpid);
00361         if (TowerStatus[did-1]!=1) numMaskTow[tpid]++;
00362       }
00363     }
00364   }
00365   
00366 
00367   if (mConfig==kOffline){
00368     for (int did=1; did<=kNTowers; did++){
00369       Int_t tpid;
00370       mTables->getStatus(BTOW, did, TowerStatus[did-1]);
00371       if (mTables->status(BTOW,did,"calib")!=1) TowerStatus[did-1]=0; 
00372       mDecoder->GetTriggerPatchFromTowerId(did,tpid);
00373       if (TowerStatus[did-1]!=1) numMaskTow[tpid]++;
00374     }
00375   }
00376   
00377   if (mConfig==kExpert){
00378     for (int did=1; did<=kNTowers; did++){
00379       Int_t tpid;
00380       TowerStatus[did-1]=1;
00381       mDecoder->GetTriggerPatchFromTowerId(did,tpid);
00382       if (TowerStatus[did-1]!=1) numMaskTow[tpid]++;
00383     }
00384   }
00385 }
00386 //==================================================
00387 //==================================================
00388 void StBemcTriggerSimu::getDSM_TPStatus(){
00389 
00390   for (int tpid=0;tpid<kNPatches;tpid++) DSM_TPStatus[tpid]=1;
00391    
00392   //for online config TP status is set by DB
00393   if (mConfig==kOnline){
00394     for (int tpid=0;tpid<kNPatches;tpid++){
00395       DSM_TPStatus[tpid]=mTables->triggerPatchStatus(tpid);
00396     }
00397   }
00398  
00399  //for offline config all TP status is good by definition. 
00400   if (mConfig==kOffline) {
00401     for (int tpid=0;tpid<kNPatches;tpid++){
00402       DSM_TPStatus[tpid]=1;
00403     }
00404   }
00405  
00406   //experts do as you will but set good by definition
00407   if (mConfig==kExpert){
00408     for (int tpid=0;tpid<kNPatches;tpid++){
00409       DSM_TPStatus[tpid]=1;
00410     }
00411   }
00412 
00413 }
00414 //==================================================
00415 //==================================================
00416 void StBemcTriggerSimu::getDSM_HTStatus(){
00417   
00418   for (int tpid=0;tpid<kNPatches;tpid++) DSM_HTStatus[tpid]=1;
00419 
00420   //Online get DSM HT status from db
00421   if (mConfig==kOnline){
00422     for (int tpid=0;tpid<kNPatches;tpid++){
00423       DSM_HTStatus[tpid]=mTables->triggerHighTowerStatus(tpid);
00424     }
00425   }
00426   
00427  //Offline all DSM HT status are good
00428   if (mConfig==kOffline){
00429     for (int tpid=0; tpid<kNPatches; tpid++){
00430       DSM_HTStatus[tpid]=1;
00431     }
00432   }
00433  
00434   if (mConfig==kExpert){
00435     for (int tpid=0;tpid<kNPatches;tpid++){
00436       DSM_HTStatus[tpid]=1;
00437     }
00438   } 
00439 }
00440 //==================================================
00441 //==================================================
00442 void StBemcTriggerSimu::getPed() {
00443 
00444   for (int i=1;i<=kNTowers;i++) {ped12[i-1]=0;}
00445   
00446   for (int did=1;did<=kNTowers;did++){
00447     bitConvValue[did-1]=mTables->triggerBitConversionByID(did);
00448   }
00449 
00450   //get Target Pedestal value from DB
00451   pedTargetValue=mTables->triggerPedestalShift();
00452 
00453   //online 12 bit peds stored as Float_t
00454   if (mConfig==kOnline){
00455     for (int cr=1; cr <= kNCrates; cr++){
00456       for (int ch=0; ch < kNChannels; ch++){
00457         int did;
00458         mDecoder->GetTowerIdFromCrate(cr,ch,did);
00459         ped12[did-1] = mTables->triggerPedestal(cr,ch);
00460       }
00461     }
00462   }
00463   
00464  //offline 12 bit peds stored as Float_t
00465   if (mConfig==kOffline){
00466     for (int did=1; did<=kNTowers; did++){
00467       ped12[did-1]=mTables->pedestal(BTOW,did);
00468     }
00469   }
00470 
00471   //Experts set ped to your favorite values
00472   if (mConfig==kExpert){
00473     for (int did=1; did<=kNTowers; did++){
00474       ped12[did-1]=24;
00475     }
00476   } 
00477 }
00478 //==================================================
00479 //==================================================
00480 void StBemcTriggerSimu::getLUT(){
00481 
00482   /*formula param
00483     Is the trigger mask used for LUT calculation (to account for masked towers in TP)
00484     0 = no, the LUT does not depend on which towers in a patch are masked out
00485     1 = yes, the trigger mask is used for LUT scale modification
00486     2 = yes, the trigger mask is used for LUT pedestal modification
00487 LUTUseMask 2
00488   */
00489 
00490   Int_t f,param[6];
00491   for (int cr=1;cr<=kNCrates;cr++){
00492     for (int seq=0; seq<kNSeq; seq++){
00493       mTables->getTriggerFormulaTag(cr,seq,f);
00494       mTables->getTriggerFormulaParameters(cr,seq,param);
00495       formula[cr-1][seq]=f;
00496       LUTscale[cr-1][seq]=param[0];
00497       LUTped[cr-1][seq]=param[1];
00498       LUTsig[cr-1][seq]=param[2];
00499       LUTpow[cr-1][seq]=param[3];
00500     }
00501   }
00502 }
00503 //==================================================
00504 //==================================================
00505 void StBemcTriggerSimu::Make(){
00506   
00507   mEvent = static_cast<StEvent*> ( mHeadMaker->GetDataSet("StEvent") );
00508 
00509   if (year < 2009)
00510     FEEout();
00511   else {
00512     FEEout2009();
00513     simulateFEEfailure();
00514   }
00515 
00516   //pp
00517   if (year==2006){
00518     get2006_DSMLayer0();
00519     get2006_DSMLayer1();
00520     get2006_DSMLayer2();
00521   }
00522 
00523   //AuAu
00524   if ((year==2007)&&(yyyymmdd<20071205)){
00525     get2007_DSMLayer0();
00526     get2007_DSMLayer1();
00527     get2007_DSMLayer2();
00528   }
00529   
00530   //dAu
00531   if ((yyyymmdd>20071205)&&(yyyymmdd<20080129)){
00532     get2008dAu_DSMLayer0();
00533     get2008dAu_DSMLayer1();
00534     get2008dAu_DSMLayer2();
00535   }
00536 
00537   //pp
00538   if ((year==2008)&&(yyyymmdd>20080129)){
00539     get2008pp_DSMLayer0();
00540     get2008pp_DSMLayer1();
00541     get2008pp_DSMLayer2();
00542   }
00543 
00544   //pp
00545   if ((year==2009)&&(yyyymmdd>20090101)) {
00546     get2009_DSMLayer0();
00547     get2009_DSMLayer1();
00548   }
00549 
00550   if (mMCflag) fillStEmcTriggerDetector();
00551 }
00552 //==================================================
00553 //==================================================
00554 void StBemcTriggerSimu::FEEout() {
00555   //many parts copied directly from Oleksandr's BEMC_DSM_decoder.cxx
00556   //which is a C++ translation of the FEE code
00557   //ped1 == ped12Diff value2 == ped10Diff value1 == ped10DiffI
00558    
00559    
00560   //  static int commonLUT[] = {0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  1,  2,  3,  4,  5,  6,  7,  8,  9,
00561   static int commonLUT[] = { 1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  2,  3,  4,  5,  6,  7,  8,  9,
00562                             10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
00563                             35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
00564                             60, 61, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 
00565                             62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 
00566                             62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62}; 
00567   
00568   if(!mEvent) {LOG_WARN << "StBemcTriggerSimu -- no StEvent!" << endm;}
00569   
00570   StEmcCollection *emc = mEvent->emcCollection();
00571   if(!emc)    {LOG_WARN << "StBemcTriggerSimu -- no StEmcCollection!" << endm;}
00572   
00573   StEmcDetector* detector=emc->detector(kBarrelEmcTowerId);
00574   if(!detector) {LOG_WARN << "StBemcTriggerSimu -- no StEmcDetector!" << endm;}
00575 
00576   //loop through BEMC hits 
00577   //Store 8,10,12 bit pedestal adjusted ADC for hits
00578   //for online case online tower masks are applied
00579   //for offline case offline tower masks are applied
00580   //DSM TP/HT masks are applied for online case
00581   //DSM TP/HT masks are perfect for offline case
00582   if(detector) {
00583     for(Int_t m = 1; m <= 120; ++m) {
00584       StEmcModule* module = detector->module(m);
00585       if(module) {
00586         StSPtrVecEmcRawHit& rawHit=module->hits();
00587         for(UInt_t k = 0; k < rawHit.size(); ++k) {
00588           if(rawHit[k]) {
00589             int did, tpid;
00590             
00591             Int_t m=rawHit[k]->module();
00592             Int_t e=rawHit[k]->eta();
00593             Int_t s=abs(rawHit[k]->sub());
00594             Int_t adc=rawHit[k]->adc();
00595             //Float_t energy=rawHit[k]->energy();
00596 
00597             //Get software tower id and trigger patch id
00598             mGeo->getId(m,e,s,did);       
00599             mDecoder->GetTriggerPatchFromTowerId(did,tpid);
00600             
00601             //apply tower masks
00602             if (TowerStatus[did-1]==1) {
00603   
00604               //need to shift ADC and ped to pedTargetValue 
00605               //goal is to ultimately place DSM channel at 1
00606               ped12Diff=ped12[did-1]-pedTargetValue;
00607               
00608               //12 bit ADC enters FEE and drop 2 bits immediately
00609               adc12[did-1]=adc;
00610               adc10[did-1]=adc12[did-1] >> 2;
00611   
00612               //determine if pedestal is > or < pedTargetValue
00613               int operation=1;
00614               if(ped12Diff < 0) {
00615                 ped12Diff = -ped12Diff;
00616                 operation = 0;
00617               }
00618               ped10Diff = ped12Diff/4;
00619 
00620               //Rounds ped10Diff up/down to an Int_t
00621               sprintf(buffer,"%3.0f",ped10Diff);
00622               ped10DiffI=atoi(buffer);
00623         
00624               //effective rounding up for binary numbers with 1xx,10xx,11xx,100xx,101xx,110xx,111xx etc
00625               //so that carrying out ADC12 - PED12 + 24 in 12 bit land is the same exercise as in 10 bit land
00626               if (ped12Diff - ped10DiffI*4 > 2) {
00627                 ped10Diff+=1;
00628                 sprintf(buffer,"%3.0f",ped10Diff);
00629                 ped10DiffI=atoi(buffer);
00630               }
00631 
00632               // can't subtract/add more than 15 on 10-bit level
00633               if(ped10DiffI > 15) {
00634                 sprintf(buffer,"%3.0f",double(ped10DiffI - 11)/4);
00635                 int holder = atoi(buffer);
00636                 ped10Diff = ped10DiffI - 4*holder;
00637                 sprintf(buffer,"%3.0f",ped10Diff);
00638                 ped10DiffI = atoi(buffer);
00639               }
00640 
00641               //adjust pedestal of tower adc to 24(6) in 12(10) bit
00642               if (operation==1) adc10[did-1] -= ped10DiffI;
00643               if (operation==0) adc10[did-1] += ped10DiffI;
00644               // if in offline mode and pedestal is not matched well to adc spectrum so
00645               // adc -ped < 0 then set adc = 0 so it cannot cause a trigger.
00646               if ((mConfig==kOffline)&&(adc10[did-1] < 0)) adc10[did-1]=0;
00647 
00648               //now adc10 and adc08 are the 10 and 8 bit pedestal shift adcs
00649               adc08[did-1]=adc10[did-1] >> 2;
00650     
00651               //subject all towers to HT algorithm and transform adc10 into adc06
00652               int HTholder=-1;
00653 
00654               if (mConfig==kOnline) HTholder = adc10[did-1] >> bitConvValue[did-1];//drop lowest bits   
00655               if (mConfig==kOffline) HTholder = adc10[did-1] >> HT_FEE_Offset;//drop lowest bits
00656 
00657               int HTL = HTholder & 0x1F;// AND HTholder with 00011111 to grab 5 lowest bits
00658               int HTH = HTholder >> 5;//Remove lowest 5 bits
00659               int B5  = 0;
00660               if(HTH>0) B5 = 1;
00661               HTadc06[did-1] = HTL+(B5<<5);
00662 
00663               //Fill DSM L0 with 6bit HT/TP in each TP
00664               HT6bit_adc_holder[did-1]=HTadc06[did-1]; 
00665               if (DSM_HTStatus[tpid]==1){
00666                 if (HTadc06[did-1]>L0_HT_ADC[tpid]) L0_HT_ADC[tpid]=HTadc06[did-1];
00667               }
00668               if (DSM_TPStatus[tpid]==1) {
00669                 L0_TP_ADC[tpid]+=adc08[did-1];
00670                 TP6bit_adc_holder[tpid]+=adc08[did-1]; 
00671                 //Calculate LUT ped for OFFLINE
00672                 L0_TP_PED[tpid]++;
00673               }
00674               
00675               //Mask out 6 bit adc if that DSM HT/TP bit was masked out
00676               if (DSM_HTStatus[tpid]==0) L0_HT_ADC[tpid]=0;
00677               if (DSM_TPStatus[tpid]==0) L0_TP_ADC[tpid]=0;
00678               if (DSM_TPStatus[tpid]==0) TP6bit_adc_holder[tpid]=0; 
00679               
00680               if  (0)
00681                 {
00682                   cout<<"Tow#="<<did<<" TP#="<<tpid<<" adc12="<<adc12[did-1]<<" adc10="<<adc10[did-1]<<" adc08="<<adc08[did-1]     
00683                       <<" HTadc06="<<HTadc06[did-1]<<" ped12="<<ped12[did-1]<<" ped12diff="<<ped12Diff<<" ped10Diff="
00684                       <<ped10Diff<<"HTholder="<<HTholder<<" HTL="<<HTL<<" HTH="<<HTH<<" B5="<<B5<<" BitConverValue="<<bitConvValue[did-1]
00685                       <<" HT_FEE_Offset="<<HT_FEE_Offset<<" L0_TP_ADC="<<L0_TP_ADC[tpid]<<" PedTargetValue="<<pedTargetValue<<endl;
00686                 }
00687             }
00688           }
00689         }
00690       }
00691     }
00692   }
00693 
00694   //Find LUT
00695   for (int tpid=0;tpid<kNPatches;tpid++){ 
00696    
00697 
00698     Int_t cr, seq, chan, LUTindex;
00699     mDecoder->GetCrateAndSequenceFromTriggerPatch(tpid,cr,seq); 
00700     chan=seq/16;
00701     
00702     if (mConfig==kOnline)
00703       {
00704 
00705         if ( ((L0_TP_ADC[tpid]+LUTped[cr-1][chan]+2)>=0) && (formula[cr-1][chan]==2) && (LUTscale[cr-1][chan]==1) && 
00706              (LUTpow[cr-1][chan]!=0) && (LUTsig[cr-1][chan]==0) && (pedTargetValue==24))
00707           {
00708             LUTindex=L0_TP_ADC[tpid] + LUTped[cr-1][chan] + numMaskTow[tpid];
00709             LUT[tpid] = commonLUT[LUTindex];
00710           }  
00711         else
00712           {
00713             /*    cout<<"Someting NOT right with LUT!"<<
00714               " LUTped="<<LUTped[cr-1][chan]+2<<" formula="<<formula[cr-1][chan]<<
00715               " LUTscale="<<LUTscale[cr-1][chan]<<" LUTpow="<<LUTpow[cr-1][chan]<<
00716               " LUTsig="<<LUTsig[cr-1][chan]<<" pedTargetValue="<<pedTargetValue<<endl;
00717               assert(1);
00718             */
00719           }
00720         L0_TP_ADC[tpid]=LUT[tpid];    
00721         TP6bit_adc_holder[tpid]=LUT[tpid]; 
00722       }
00723     
00724    
00725     if (mConfig==kOffline) {
00726       // MOCK up LUT table for Offline case
00727       if ((L0_TP_PED[tpid]-1)>=L0_TP_ADC[tpid]) { 
00728         L0_TP_ADC[tpid]=1;
00729         TP6bit_adc_holder[tpid]=1; 
00730       }
00731       if ((L0_TP_PED[tpid]-1)< L0_TP_ADC[tpid]) {
00732         L0_TP_ADC[tpid]-=(L0_TP_PED[tpid]-1);
00733         TP6bit_adc_holder[tpid]-=(L0_TP_PED[tpid]-1);
00734       }
00735       if (L0_TP_ADC[tpid] > 62) {
00736         L0_TP_ADC[tpid]=62;
00737         TP6bit_adc_holder[tpid]=62;
00738       }
00739     }
00740         
00741 
00742     if (0) 
00743       {
00744         cout<<" tpid="<<tpid<<" cr="<<cr<<" ch="<<chan<<" formula="<<formula[cr-1][chan]<<
00745           " TPadc="<<L0_TP_ADC[tpid]<<" OfflinePed="<<L0_TP_PED[tpid]<<" LUTped="<<LUTped[cr-1][chan]<<
00746           " numMaskTow="<<numMaskTow[tpid]<<" LUTindex="<<LUTindex<<" OnlineLUT="<<LUT[tpid]<<
00747           " diff="<<(L0_TP_ADC[tpid] - (L0_TP_PED[tpid]-1)) - (LUT[tpid])<<endl;   
00748       }  
00749   }
00750 
00751   // LOG_DEBUG messages
00752   LOG_DEBUG << "BEMC trigger patch format is HT/TPsum" << endm;
00753   for (int dsm = 0; dsm < 30; ++dsm) {
00754     TString line = Form("TP%d-%d: ",dsm*10,dsm*10+9);
00755     for (int ch = 0; ch < 10; ++ch) {
00756       int triggerPatch = dsm*10+ch;
00757       line += Form("%d/%d ",L0_HT_ADC[triggerPatch],L0_TP_ADC[triggerPatch]);
00758     }
00759     LOG_DEBUG << line << endm;
00760   }
00761 }
00762 
00763 void StBemcTriggerSimu::GetTriggerPatchFromCrate(int crate, int seq, int& triggerPatch) const
00764 {
00765   triggerPatch = (340-10*crate)%150+seq;
00766   if (crate <= 15) triggerPatch += 150;
00767 }
00768 
00769 void StBemcTriggerSimu::FEEini2009(int runNumber)
00770 {
00771   const bool debug = false;
00772 
00773   mTables->getTriggerPedestalShift((int&)pedTargetValue);
00774   LOG_INFO << "pedTargetValue\t" << pedTargetValue << endm;
00775   fill(numMaskTow,numMaskTow+kNPatches,0);
00776   LOG_INFO << "towerId\ttriggerPatch\tcrate\tseq\tstatus\tpedestal\tFEEpedestal\tgain" << endm;
00777   for (int towerId = 1; towerId <= kNTowers; ++towerId) {
00778     int crate, seq, status, triggerPatch;
00779     float rms;
00780     mDecoder->GetCrateFromTowerId(towerId,crate,seq);
00781     mDecoder->GetTriggerPatchFromTowerId(towerId,triggerPatch);
00782     TriggerPatchFromTowerId[towerId-1] = triggerPatch;
00783     switch (mConfig) {
00784     case kOnline:
00785       mTables->getTriggerTowerStatus(crate,seq,status);
00786       mTables->getTriggerPedestal(crate,seq,ped12[towerId-1]);
00787       break;
00788     case kOffline:
00789       mTables->getStatus(BTOW,towerId,status);
00790       mTables->getPedestal(BTOW,towerId,0,ped12[towerId-1],rms);
00791       break;
00792     default:
00793       assert(mConfig == kOnline || mConfig == kOffline);
00794       break;
00795     } // switch mConfig
00796     TowerStatus[towerId-1] = status == 1 || status == 18;
00797     if (!TowerStatus[towerId-1]) ++numMaskTow[triggerPatch];
00798     FEEped[towerId-1] = getFEEpedestal(ped12[towerId-1],pedTargetValue,debug);
00799     mTables->getCalib(BTOW,towerId,1,TowerGain[towerId-1]);
00800     LOG_INFO << Form("%d\t%d\t%d\t%d\t%d\t%.2f\t%d\t%.5f",towerId,triggerPatch,crate,seq,status,ped12[towerId-1],FEEped[towerId-1],TowerGain[towerId-1]) << endm;
00801   } // for towerId
00802 
00803   // These towers are swapped for Run 9
00804   // and cross trigger patch boundaries:
00805   // 4054 <---> 4014 (TP227 <---> TP236)
00806   // 4055 <---> 4015 (TP227 <---> TP236)
00807   // 4056 <---> 4016 (TP227 <---> TP236)
00808   // 4057 <---> 4017 (TP229 <---> TP238)
00809   swap(TriggerPatchFromTowerId[4054-1],TriggerPatchFromTowerId[4014-1]);
00810   swap(TriggerPatchFromTowerId[4055-1],TriggerPatchFromTowerId[4015-1]);
00811   swap(TriggerPatchFromTowerId[4056-1],TriggerPatchFromTowerId[4016-1]);
00812   swap(TriggerPatchFromTowerId[4057-1],TriggerPatchFromTowerId[4017-1]);
00813 
00814   // Tower 1907 (TP13) has huge pedestal (2068.39) starting with run 10154060
00815   // and time stamp 2009-06-03 20:38:58 GMT. Mask it off.
00816   //if (timestamp >= TDatime("2009-06-03 20:38:58").Get()) TowerStatus[1907-1] = 0;
00817   if (runNumber >= 10154060 && runNumber <= 10180034) TowerStatus[1907-1] = 0;
00818 
00819   // Tower 1233 has zero gain
00820   if (runNumber >= 10141025 && runNumber <= 10155022) TowerStatus[1233-1] = 0;
00821 
00822   // Tower 4355 has huge pedestal (42949672.00). Mask it out.
00823   if (runNumber >= 10136035 && runNumber <= 10136070) TowerStatus[4355-1] = 0;
00824 
00825   // Tower 1433 has zero gain in pp500
00826   if (runNumber >= 10078075 && runNumber <= 10103042) TowerStatus[1433-1] = 0;
00827 
00828   LOG_INFO << "triggerPatch\tcrate\tseq\tHTsta\tTPsta\tbitConv\tformula\tLUTscale\tLUTped\tLUTsig\tLUTpow\tpar4\tpar5\tnumMaskTow" << endm;
00829   for (int crate = 1; crate <= kNCrates; ++crate) {
00830     for (int seq = 0; seq < kNSeq; ++seq) {
00831       int triggerPatch;
00832       GetTriggerPatchFromCrate(crate,seq,triggerPatch);
00833       TriggerPatchFromCrate[crate-1][seq] = triggerPatch;
00834       mTables->getTriggerHighTowerStatus(triggerPatch,DSM_HTStatus[triggerPatch]);
00835       mTables->getTriggerPatchStatus(triggerPatch,DSM_TPStatus[triggerPatch]);
00836       mTables->getTriggerBitConv(crate,seq,(int&)bitConvValue[triggerPatch]);
00837       mTables->getTriggerFormulaTag(crate,seq,formula[crate-1][seq]);
00838       int parameters[6];
00839       mTables->getTriggerFormulaParameters(crate,seq,parameters);
00840       LUTscale[crate-1][seq] = parameters[0];
00841       LUTped  [crate-1][seq] = parameters[1];
00842       LUTsig  [crate-1][seq] = parameters[2];
00843       LUTpow  [crate-1][seq] = parameters[3];
00844       LOG_INFO << Form("%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d",triggerPatch,crate,seq,DSM_HTStatus[triggerPatch],DSM_TPStatus[triggerPatch],bitConvValue[triggerPatch],formula[crate-1][seq],parameters[0],parameters[1],parameters[2],parameters[3],parameters[4],parameters[5],numMaskTow[triggerPatch]) << endm;
00845     } // for seq
00846   } // for crate
00847 
00848   // Special cases:
00849 
00850   // TP90-99 don't let the BEMC configuration software overwrite their power-up default values
00851   // with settings from the database. Furthermore, the bitConv bits for TP92-93 are flaky;
00852   // most of the time bitConv=2, but sometimes bitConv=0.
00853   fill(bitConvValue+90,bitConvValue+100,2);
00854 
00855   // TP277 TPsum output is always 0
00856   DSM_TPStatus[277] = 0;
00857 
00858   // TP50-59 have wrong config for run 10128030 (Start 2009-05-08 08:52:14 GMT) to 10129011 (Stop 2009-05-09 07:38:42 GMT)
00859   //if (TDatime("2009-05-08 08:52:14").Get() <= timestamp && timestamp <= TDatime("2009-05-09 07:38:42").Get()) {
00860   if (runNumber >= 10128030 && runNumber <= 10129011) {
00861     bitConvValue[50] = 2;
00862     bitConvValue[51] = 2;
00863     bitConvValue[52] = 3;
00864     bitConvValue[53] = 3;
00865     bitConvValue[54] = 2;
00866     bitConvValue[55] = 2;
00867     bitConvValue[56] = 2;
00868     bitConvValue[57] = 2;
00869     bitConvValue[58] = 3;
00870     bitConvValue[59] = 3;
00871   }
00872 
00873   // Copycat channels: The last 3 towers of the first trigger patch and all 16 towers of the second trigger patch
00874   // have duplicate ADCs. A solution is to mask out both the high tower and patch sum output of the affected tower
00875   // front end electronics (FEEs) in both the simulation and data for consistency. In addition, all 32 towers from
00876   // both trigger patches (1 FEE board) should be masked out in the offline BEMC status tables.
00877   // It is not clear what causes this problem but it seems to be a failure mode of either the tower crate multiplexer
00878   // or the tower data collector (TDC). See the BEMC Technical Design Report, pp. 133-134:
00879   // http://drupal.star.bnl.gov/STAR/system/files/BEMC%20TDR.pdf
00880   // This problem has been identified in the BEMC data as far back as 2006 and as recently as 2011.
00881   // See analysis:
00882   // http://cyclotron.tamu.edu/pibero/jets/2011.10.18/JetMeeting-2011.10.18.pdf
00883   if (runNumber >= 10120032 && runNumber <= 10121053) {
00884     DSM_HTStatus[228] = 0;
00885     DSM_TPStatus[228] = 0;
00886     DSM_HTStatus[229] = 0;
00887     DSM_TPStatus[229] = 0;
00888   }
00889 
00890   if (runNumber >= 10150051 && runNumber <= 10156058) {
00891     DSM_HTStatus[122] = 0;
00892     DSM_TPStatus[122] = 0;
00893     DSM_HTStatus[123] = 0;
00894     DSM_TPStatus[123] = 0;
00895   }
00896 
00897   if (runNumber >= 10156086 && runNumber <= 10160017) {
00898     DSM_HTStatus[22] = 0;
00899     DSM_TPStatus[22] = 0;
00900     DSM_HTStatus[23] = 0;
00901     DSM_TPStatus[23] = 0;
00902   }
00903 
00904   if (runNumber >= 10163048 && runNumber <= 10180034) {
00905     DSM_HTStatus[220] = 0;
00906     DSM_TPStatus[220] = 0;
00907     DSM_HTStatus[221] = 0;
00908     DSM_TPStatus[221] = 0;
00909   }
00910 }
00911 
00912 void StBemcTriggerSimu::FEEout2009()
00913 {
00914   const bool debug = false;
00915 
00916   StEmcCollection* emc = mEvent->emcCollection();
00917   if (!emc) {
00918     LOG_WARN << "No StEmcCollection" << endm;
00919     return;
00920   }
00921 
00922   StEmcDetector* det = emc->detector(kBarrelEmcTowerId);
00923   if (!det) {
00924     LOG_WARN << "No StEmcDetector" << endm;
00925     return;
00926   }
00927 
00928   // FEE action
00929   int nhits = 0;
00930 
00931   for (size_t m = 1; m <= det->numberOfModules(); ++m) {
00932     const StSPtrVecEmcRawHit& hits = det->module(m)->hits();
00933     nhits += hits.size();
00934     for (size_t i = 0; i < hits.size(); ++i) {
00935       const StEmcRawHit* hit = hits[i];
00936       int towerId = hit->softId(BTOW);
00937       if (TowerStatus[towerId-1]) {
00938         int triggerPatch = TriggerPatchFromTowerId[towerId-1];
00939         int ht, pa;
00940         simulateFEEaction(hit->adc(),FEEped[towerId-1],bitConvValue[triggerPatch],ht,pa,debug);
00941         HT6bit_adc_holder[towerId-1] = ht;
00942         if (ht > L0_HT_ADC[triggerPatch]) L0_HT_ADC[triggerPatch] = ht;
00943         L0_TP_ADC[triggerPatch] += pa;
00944       } // if TowerStatus
00945     } // for i
00946   } // for m
00947 
00948   // Make sure BTOW has 4800 hits. Towers with no physics signal are just
00949   // set to pedestal. This is achieved in real data and embedding macros with:
00950   //
00951   // StEmcADCtoEMaker* bemcAdc = new StEmcADCtoEMaker;
00952   // bemcAdc->saveAllStEvent(true);
00953   //
00954   // and IN ADDITION simulation macros need:
00955   //
00956   // StEmcSimulatorMaker* emcSim = (StEmcSimulatorMaker*)chain->GetMaker("EmcSimulator");
00957   // emcSim->setCheckStatus(kBarrelEmcTowerId,false);
00958   // emcSim->setMakeFullDetector(kBarrelEmcTowerId,true);
00959   // emcSim->setDoZeroSuppression(kBarrelEmcTowerId,false);
00960   assert(nhits == kNTowers);
00961 
00962   // FEE LUT
00963   for (int crate = 1; crate <= kNCrates; ++crate) {
00964     for (int seq = 0; seq < kNSeq; ++seq) {
00965       int triggerPatch = TriggerPatchFromCrate[crate-1][seq];
00966       if (!DSM_HTStatus[triggerPatch]) L0_HT_ADC[triggerPatch] = 0;
00967       if (!DSM_TPStatus[triggerPatch]) L0_TP_ADC[triggerPatch] = 0;
00968       else {
00969         int lut;
00970         simulateFEELUT(L0_TP_ADC[triggerPatch],formula[crate-1][seq],LUTscale[crate-1][seq],LUTped[crate-1][seq],LUTsig[crate-1][seq],LUTpow[crate-1][seq],0,0,numMaskTow[triggerPatch],pedTargetValue,lut,debug);
00971         L0_TP_ADC[triggerPatch] = TP6bit_adc_holder[triggerPatch] = lut;
00972       }
00973     } // for seq
00974   } // for crate
00975 }
00976 
00977 void StBemcTriggerSimu::simulateFEEfailure()
00978 {
00979   switchon(L0_HT_ADC[166],1);
00980   switchon(L0_HT_ADC[199],0);
00981   switchoff(++L0_HT_ADC[277],0);
00982   switchoff(L0_HT_ADC[292],1);
00983 
00984   int runNumber = StMaker::GetChain()->GetRunNumber();
00985 
00986   if (runNumber >= 10169005 && runNumber <= 10180034) switchon(L0_HT_ADC[196],2);
00987   if (runNumber >= 10156086 && runNumber <= 10158021) switchoff(++L0_HT_ADC[288],0);
00988 
00989   if (runNumber >= 10131039 && runNumber <= 10139018) switchoff(L0_TP_ADC[239],0);
00990   if (runNumber >= 10160069 && runNumber <= 10162040) switchoff(L0_TP_ADC[161],1);
00991   if (runNumber >= 10121092 && runNumber <= 10136031) switchon (L0_TP_ADC[137],0);
00992   if (runNumber >= 10156031 && runNumber <= 10180034) switchon (L0_TP_ADC[137],0);
00993   if (runNumber >= 10154060 && runNumber <= 10155022) switchon (L0_TP_ADC[13 ],0);
00994 }
00995 
00996 //==================================================
00997 //==================================================
00998 void StBemcTriggerSimu::get2006_DSMLayer0() {
00999 
01000   //0-(8)9 ADC sum Trigger Patches
01001   //10-11  HT threshold bits
01002   //12-13  TP threshold bits
01003   //14-15  HT&&TP threshold bits
01004 
01005   //SWITCH MISMATCHED tpid HERE for 2006
01006   int placeholder;
01007   placeholder=L0_HT_ADC[291];
01008   L0_HT_ADC[291]=L0_HT_ADC[294];
01009   L0_HT_ADC[294]=placeholder;
01010   placeholder=L0_HT_ADC[250];
01011   L0_HT_ADC[250]=L0_HT_ADC[251];
01012   L0_HT_ADC[251]=placeholder;
01013   placeholder=L0_HT_ADC[263];
01014   L0_HT_ADC[263]=L0_HT_ADC[267];
01015   L0_HT_ADC[267]=placeholder;
01016 
01017   placeholder=L0_TP_ADC[291];
01018   L0_TP_ADC[291]=L0_TP_ADC[294];
01019   L0_TP_ADC[294]=placeholder;
01020   placeholder=L0_TP_ADC[250];
01021   L0_TP_ADC[250]=L0_TP_ADC[251];
01022   L0_TP_ADC[251]=placeholder;
01023   placeholder=L0_TP_ADC[263];
01024   L0_TP_ADC[263]=L0_TP_ADC[267];
01025   L0_TP_ADC[267]=placeholder;
01026 
01027   //Loop over modules
01028   int k=0;
01029   int DSM_TP[kL0DsmInputs];
01030   for (int i=0;i<kL0DsmModule;i++){
01031 
01032     //Zero out 16 bit L0 TP/HT/HTTP outputs for each module
01033     DSM0_TP_SUM[i]=0; 
01034     DSM0_HT_Bit[i]=0;
01035     DSM0_TP_Bit[i]=0;
01036     DSM0_HTTP_Bit[i]=0;
01037 
01038     DSM0_TP_SUM_J1[i]=0;
01039     DSM0_HT_Bit_J1[i]=0;
01040     DSM0_TP_Bit_J1[i]=0;
01041     DSM0_HTTP_Bit_J1[i]=0;
01042 
01043     DSM0_TP_SUM_J3[i]=0;
01044     DSM0_HT_Bit_J3[i]=0;
01045     DSM0_TP_Bit_J3[i]=0;
01046     DSM0_HTTP_Bit_J3[i]=0;
01047 
01048     //Zero out 16 bit L0 TP/HT/HTTP outputs for each L0 input
01049     for (int j=0;j<kL0DsmInputs;j++){ 
01050       DSM0_HT_tp_Bit[j]=0;
01051       DSM0_TP_tp_Bit[j]=0;
01052       DSM0_HTTP_tp_Bit[j]=0; 
01053       DSM0_HT_tp_Bit_J1[j]=0;
01054       DSM0_TP_tp_Bit_J1[j]=0;
01055       DSM0_HTTP_tp_Bit_J1[j]=0; 
01056       DSM0_HT_tp_Bit_J3[j]=0;
01057       DSM0_TP_tp_Bit_J3[j]=0;
01058       DSM0_HTTP_tp_Bit_J3[j]=0;      
01059     }
01060   
01061     //Get array of TPid# from DSM module#
01062     mDecoder->GetTriggerPatchesFromDSM(i,DSM_TP);
01063 
01064 #ifdef DEBUG
01065     // Overwrite input to BEMC layer 0 DSMs (output of BEMC FEEs)
01066     // with content of trigger bank from MuDst (data only).
01067     // First fill the Layer0 histograms with results from FEEout()
01068     if (mHeadMaker->GetDataSet("MuDst")) {
01069       StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
01070       for (int triggerPatch = 0; triggerPatch < kNPatches; ++triggerPatch) {
01071         mBEMCLayer0HT6bit->Fill(triggerPatch,emcTrig.highTower(triggerPatch));
01072         mBEMCLayer0TP6bit->Fill(triggerPatch,emcTrig.patch(triggerPatch));
01073         mBEMCLayer0HT6bitDiff->Fill(triggerPatch,emcTrig.highTower(triggerPatch)-L0_HT_ADC[triggerPatch]);
01074         mBEMCLayer0TP6bitDiff->Fill(triggerPatch,emcTrig.patch(triggerPatch)-L0_TP_ADC[triggerPatch]);
01075         L0_HT_ADC[triggerPatch] = emcTrig.highTower(triggerPatch);
01076         L0_TP_ADC[triggerPatch] = emcTrig.patch(triggerPatch); 
01077       }
01078     }
01079 #endif
01080     
01081 
01082     //Loop over 10 inputs to each module 
01083     for (int j=0;j<kL0DsmInputs;j++){
01084       
01085       int tpid=DSM_TP[j];
01086       int jpid=-1;
01087       int seq=-1;
01088       mDecoder->GetJetPatchAndSequenceFromTriggerPatch(tpid, jpid, seq); 
01089 
01090       //Skip modules 2,7,12,17,22,27 
01091       if (i%5!=2) {
01092         
01093         //apply HT thresholds to each HT adc in each TP
01094         if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit[j]=0;
01095         if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit[j]=1;
01096         if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit[j]=2;
01097         if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit[j]=3;
01098         
01099         if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit[j]=0;
01100         if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit[j]=1;
01101         if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit[j]=2;
01102         if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit[j]=3;
01103 
01104         //apply HTTP condition - TP&&HT
01105         if (DSM0_TP_tp_Bit[j] >= DSM0_HT_tp_Bit[j]) DSM0_HTTP_tp_Bit[j]=DSM0_HT_tp_Bit[j];
01106         if (DSM0_HT_tp_Bit[j] >= DSM0_TP_tp_Bit[j]) DSM0_HTTP_tp_Bit[j]=DSM0_TP_tp_Bit[j];
01107         //then || each input
01108         if (DSM0_HTTP_tp_Bit[j] > DSM0_HTTP_Bit[i]) DSM0_HTTP_Bit[i]=DSM0_HTTP_tp_Bit[j];
01109 
01110         //add up TP adc for 2/5 of JP
01111         DSM0_TP_SUM[i]+=L0_TP_ADC[tpid];
01112         
01113         if (DSM0_HT_Bit[i]< DSM0_HT_tp_Bit[j]) DSM0_HT_Bit[i]=DSM0_HT_tp_Bit[j];
01114         if (DSM0_TP_Bit[i]< DSM0_TP_tp_Bit[j]) DSM0_TP_Bit[i]=DSM0_TP_tp_Bit[j];
01115         if (DSM0_HTTP_Bit[i]< DSM0_HTTP_tp_Bit[j]) DSM0_HTTP_Bit[i]=DSM0_HTTP_tp_Bit[j];
01116       }
01117       
01118       //Loop over 2x5 inputs(TP) for modules 2,7,12,17,22,29
01119       if (i%5==2){
01120 
01121         if (j%2)
01122           {
01123             if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J3[j]=0;
01124             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J3[j]=1;
01125             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J3[j]=2;
01126             if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit_J3[j]=3;
01127           }
01128         else
01129           {
01130             if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J1[j]=0;
01131             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J1[j]=1;
01132             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J1[j]=2;
01133             if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit_J1[j]=3;
01134           }
01135         
01136         //apply TP thresholds to each TP adc in each TP
01137         if (j%2)
01138           {
01139             if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J3[j]=0;
01140             if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit_J3[j]=1;
01141             if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit_J3[j]=2;
01142             if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit_J3[j]=3;
01143           }                       
01144         else
01145           {
01146             if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J1[j]=0;
01147             if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit_J1[j]=1;
01148             if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit_J1[j]=2;
01149             if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit_J1[j]=3;
01150           }
01151         
01152         
01153         //apply HTTP condition - TP&&HT
01154         if (j%2) 
01155           {
01156             if (DSM0_TP_tp_Bit_J3[j] >= DSM0_HT_tp_Bit_J3[j]) DSM0_HTTP_tp_Bit_J3[j]=DSM0_HT_tp_Bit_J3[j];
01157             if (DSM0_HT_tp_Bit_J3[j] >= DSM0_TP_tp_Bit_J3[j]) DSM0_HTTP_tp_Bit_J3[j]=DSM0_TP_tp_Bit_J3[j];
01158             if (DSM0_HTTP_tp_Bit_J3[j] > DSM0_HTTP_Bit_J3[j]) DSM0_HTTP_Bit_J3[j]=DSM0_HTTP_tp_Bit_J3[j];
01159           }
01160         else
01161           {
01162             if (DSM0_TP_tp_Bit_J1[j] >= DSM0_HT_tp_Bit_J1[j]) DSM0_HTTP_tp_Bit_J1[j]=DSM0_HT_tp_Bit_J1[j];
01163             if (DSM0_HT_tp_Bit_J1[j] >= DSM0_TP_tp_Bit_J1[j]) DSM0_HTTP_tp_Bit_J1[j]=DSM0_TP_tp_Bit_J1[j];
01164             if (DSM0_HTTP_tp_Bit_J1[j] > DSM0_HTTP_Bit_J1[j]) DSM0_HTTP_Bit_J1[j]=DSM0_HTTP_tp_Bit_J1[j];
01165           }     
01166         
01167         
01168         //add up TP adc for 1/5 of JP
01169         if (j%2)
01170           DSM0_TP_SUM_J3[i]+=L0_TP_ADC[tpid];
01171         else
01172           DSM0_TP_SUM_J1[i]+=L0_TP_ADC[tpid];
01173         
01174         //apply HT/TP/HTTP thresholds to bits
01175         if (DSM0_HT_Bit_J1[i]< DSM0_HT_tp_Bit_J1[j]) DSM0_HT_Bit_J1[i]=DSM0_HT_tp_Bit_J1[j];
01176         if (DSM0_TP_Bit_J1[i]< DSM0_TP_tp_Bit_J1[j]) DSM0_TP_Bit_J1[i]=DSM0_TP_tp_Bit_J1[j];
01177         if (DSM0_HTTP_Bit_J1[i]< DSM0_HTTP_tp_Bit_J1[j]) DSM0_HTTP_Bit_J1[i]=DSM0_HTTP_tp_Bit_J1[j];
01178         if (DSM0_HT_Bit_J3[i]< DSM0_HT_tp_Bit_J3[j]) DSM0_HT_Bit_J3[i]=DSM0_HT_tp_Bit_J3[j];
01179         if (DSM0_TP_Bit_J3[i]< DSM0_TP_tp_Bit_J3[j]) DSM0_TP_Bit_J3[i]=DSM0_TP_tp_Bit_J3[j];
01180         if (DSM0_HTTP_Bit_J3[i]< DSM0_HTTP_tp_Bit_J3[j]) DSM0_HTTP_Bit_J3[i]=DSM0_HTTP_tp_Bit_J3[j];
01181         
01182       } 
01183     }
01184     
01185     //k==8 is the problem
01186     if (i%5!=2)
01187       {
01188         L0_16bit_Out[k]=0;
01189         L0_16bit_Out[k++]=DSM0_TP_SUM[i]+(DSM0_HT_Bit[i]<<10)+(DSM0_TP_Bit[i]<<12)+(DSM0_HTTP_Bit[i]<<14);
01190       }
01191     if (i%5==2)
01192       {
01193         L0_16bit_Out[k]=0;
01194         //cout<<k<<" DSM0_HT_Bit_J3="<<DSM0_HT_Bit_J3[i]<<endl;
01195         L0_16bit_Out[k++]=DSM0_TP_SUM_J3[i]+(DSM0_HT_Bit_J3[i]<<10)+(DSM0_TP_Bit_J3[i]<<12)+(DSM0_HTTP_Bit_J3[i]<<14);
01196         //cout<<k<<" DSM0_HT_Bit_J1="<<DSM0_HT_Bit_J1[i]<<endl;
01197         L0_16bit_Out[k++]=DSM0_TP_SUM_J1[i]+(DSM0_HT_Bit_J1[i]<<10)+(DSM0_TP_Bit_J1[i]<<12)+(DSM0_HTTP_Bit_J1[i]<<14);
01198 
01199       }
01200 
01201   }
01202 
01203 #ifdef DEBUG
01204 
01205   // Fill diagnostic histograms
01206   if (mHeadMaker->GetDataSet("MuDst")) {
01207     // BEMC layer 1 DSMs are stored in this order in the trigger bank:
01208     // BE101, BE102, BE103, BW101, BW102, BW103
01209     // DSM channels are read out in this order:
01210     static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
01211     // Trigger bank <-> Emulator ==> 0, 1, 2, 3, 4, 5 <-> 3, 4, 5, 0, 1, 2
01212     static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
01213     StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
01214 
01215     // Loop over BEMC layer 1 DSMs
01216     for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
01217       // Loop over layer 1 input channels
01218       for (int ch = 0; ch < kL1DsmInputs; ++ch) {
01219 
01220         Int_t idx = dsm*8+dsm_read_map[ch];
01221         Int_t TrigBankOut = emcTrig.bemcLayer1(idx);
01222         Int_t TPSumout = (TrigBankOut & 0x3ff);
01223         Int_t TPSumbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x3ff);
01224         Int_t HTout = (TrigBankOut & 0xc00)/0x400;
01225         Int_t HTbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc00)/0x400; 
01226         Int_t TPout = (TrigBankOut & 0x3000)/0x1000;
01227         Int_t TPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x3000)/0x1000;
01228         Int_t HTTPout = (TrigBankOut & 0xc000)/0x4000;
01229         Int_t HTTPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc000)/0x4000;
01230         int TPSumdiff = (TPSumbits)-(TPSumout);
01231         int HTdiff = (HTbits) - (HTout);
01232         int TPdiff = (TPbits) - (TPout);
01233         int HTTPdiff = (HTTPbits) - (HTTPout);
01234         mBEMCLayer1PatchSum->Fill(dsm*6+ch, TPSumout);
01235         mBEMCLayer1HTBits->Fill(dsm*6+ch, HTout);       
01236         mBEMCLayer1TPBits->Fill(dsm*6+ch, TPout);
01237         mBEMCLayer1HTTPBits->Fill(dsm*6+ch, HTTPout);
01238         mBEMCLayer1PatchSumDiff->Fill(dsm*6+ch, TPSumdiff);
01239         mBEMCLayer1HTBitsDiff->Fill(dsm*6+ch, HTdiff);
01240         mBEMCLayer1TPBitsDiff->Fill(dsm*6+ch, TPdiff);
01241         mBEMCLayer1HTTPBitsDiff->Fill(dsm*6+ch, HTTPdiff);  
01242       }
01243     }
01244   }
01245 #endif
01246 
01247 }
01248 
01249 
01250 //==================================================
01251 //==================================================
01252 void StBemcTriggerSimu::get2006_DSMLayer1(){
01253 
01254 
01255   //DSM_Layer0 is passed to DSM_Layer1 in 8 UShort blocks (16 bits)
01256   //There are 6 DSM_Layer1 boards and each can take 120 bits total
01257   //So DSM_Layer0 passes 8 shorts (16*8=128) or 128 bits to each DSM_Layer1
01258 
01259   //Zero out the DSMLayer1 Bits passed to DSMLayer2
01260   for (int i=0;i<kL1DsmModule;i++){
01261     DSM1_JP_Bit[i]=0;
01262     DSM1_HTj0_Bit[i]=0;
01263     DSM1_HTj1_Bit[i]=0;
01264     DSM1_TP_Bit[i]=0;
01265     DSM1_HTTP_Bit[i]=0;
01266     DSM1_ETOT_ADC[i]=0;
01267   }
01268 
01269 
01270 #ifdef DEBUG
01271     // Overwrite input to BEMC layer 1 DSMs (output of BEMC layer 0 DSMs)
01272     // with content of trigger bank from MuDst (data only).
01273     if (mHeadMaker->GetDataSet("MuDst")) {
01274       static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
01275       static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
01276       StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
01277       for (int dsm = 0; dsm < 6; ++dsm) {
01278         int offset = TriggerBankToSimuMap[dsm]*5;
01279         DSM0_TP_SUM   [offset+0] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[0]) & 0x3ff;
01280         DSM0_TP_SUM   [offset+1] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[1]) & 0x3ff;
01281         DSM0_TP_SUM_J3[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[2]) & 0x1ff;
01282         DSM0_TP_SUM_J1[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[3]) & 0x1ff;
01283         DSM0_TP_SUM   [offset+3] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[4]) & 0x3ff;
01284         DSM0_TP_SUM   [offset+4] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[5]) & 0x3ff;
01285       }
01286     }
01287 #endif
01288     
01289   //Sum TP ADC into JP's
01290   // West
01291   DSM1_JP_ADC[0]=DSM0_TP_SUM[0]+DSM0_TP_SUM[1]+DSM0_TP_SUM_J3[2];
01292   DSM1_JP_ADC[1]=DSM0_TP_SUM[3]+DSM0_TP_SUM[4]+DSM0_TP_SUM_J1[2];
01293   DSM1_JP_ADC[2]=DSM0_TP_SUM[5]+DSM0_TP_SUM[6]+DSM0_TP_SUM_J3[7];
01294   DSM1_JP_ADC[3]=DSM0_TP_SUM[8]+DSM0_TP_SUM[9]+DSM0_TP_SUM_J1[7];
01295   DSM1_JP_ADC[4]=DSM0_TP_SUM[10]+DSM0_TP_SUM[11]+DSM0_TP_SUM_J3[12];
01296   DSM1_JP_ADC[5]=DSM0_TP_SUM[13]+DSM0_TP_SUM[14]+DSM0_TP_SUM_J1[12];
01297   
01298   // East
01299   DSM1_JP_ADC[6]=DSM0_TP_SUM[15]+DSM0_TP_SUM[16]+DSM0_TP_SUM_J1[17];
01300   DSM1_JP_ADC[7]=DSM0_TP_SUM[18]+DSM0_TP_SUM[19]+DSM0_TP_SUM_J3[17];
01301   DSM1_JP_ADC[8]=DSM0_TP_SUM[20]+DSM0_TP_SUM[21]+DSM0_TP_SUM_J1[22];
01302   DSM1_JP_ADC[9]=DSM0_TP_SUM[23]+DSM0_TP_SUM[24]+DSM0_TP_SUM_J3[22];
01303   DSM1_JP_ADC[10]=DSM0_TP_SUM[25]+DSM0_TP_SUM[26]+DSM0_TP_SUM_J1[27];
01304   DSM1_JP_ADC[11]=DSM0_TP_SUM[28]+DSM0_TP_SUM[29]+DSM0_TP_SUM_J3[27];
01305  
01306   for (int hh=0;hh<12;hh++) JP_adc_holder[hh]=DSM1_JP_ADC[hh];
01307   
01308   //Test each JP and see if it passed
01309   for (int i=0;i<kNJet;i++)
01310     {
01311       DSM1_JP_jp_Bit[i]=0;
01312       if ( DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,0)) DSM1_JP_jp_Bit[i]=0;
01313       if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,1)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,0))) DSM1_JP_jp_Bit[i]=1;
01314       if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,1))) DSM1_JP_jp_Bit[i]=2;
01315       if ( DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) DSM1_JP_jp_Bit[i]=3;
01316     }  
01317 
01318 
01319   int mod;
01320   //Translate JP's into 2 bits to pass to DSMLayer2
01321   for (int i=0;i<kNJet;i++){
01322     if (i < (kNJet/2)) mod = 0;
01323     else mod = 1;
01324     DSM1_ETOT_ADC[mod]+=DSM1_JP_ADC[i];
01325     if ( DSM1_JP_Bit[i/2] < DSM1_JP_jp_Bit[i]) DSM1_JP_Bit[i/2]=DSM1_JP_jp_Bit[i];   
01326   }
01327 
01328 
01329   //HTTP and TP bits
01330   for (int i=0; i<kL1DsmModule; i++){
01331     for (int j=0; j<5; j++){
01332       int k= i*5 + j;
01333       int kk=i*5 + 2;
01334       if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit[k]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit[k];   
01335       if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J3[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J3[kk];   
01336       if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J1[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J1[kk];
01337       if ( DSM1_TP_Bit[i] < DSM0_TP_Bit[k]) DSM1_TP_Bit[i]=DSM0_TP_Bit[k];      
01338       if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J3[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J3[kk];   
01339       if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J1[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J1[kk];         
01340     }
01341 
01342     if (DSM1_HTTP_Bit[i]>=2) DSM1_HTTP_Bit[i]=1;
01343     else if (DSM1_HTTP_Bit[i]<2) DSM1_HTTP_Bit[i]=0;
01344 
01345     if (DSM1_TP_Bit[i]>=2) DSM1_TP_Bit[i]=1;
01346     else if (DSM1_TP_Bit[i]<2) DSM1_TP_Bit[i]=0;
01347   }
01348 
01349 
01350   //WEST  HT bits
01351   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[0]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[0];
01352   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[1]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[1];
01353   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit_J3[2]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit_J3[2];
01354   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit_J1[2]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit_J1[2];
01355   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[3]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[3];
01356   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[4]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[4];
01357 
01358   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[5]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[5];
01359   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[6]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[6];
01360   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit_J3[7]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit_J3[7];
01361   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit_J1[7]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit_J1[7];
01362   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[8]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[8];
01363   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[9]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[9];
01364 
01365   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[10]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[10];
01366   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[11]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[11];
01367   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit_J3[12]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit_J3[12];
01368   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit_J1[12]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit_J1[12];
01369   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[13]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[13];
01370   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[14]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[14];
01371 
01372   //EAST HT bits
01373   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[15]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[15];
01374   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[16]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[16];
01375   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit_J1[17]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit_J1[17];
01376   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit_J3[17]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit_J3[17];
01377   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[18]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[18];
01378   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[19]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[19];
01379 
01380   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[20]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[20];
01381   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[21]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[21];
01382   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit_J1[22]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit_J1[22];
01383   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit_J3[22]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit_J3[22];
01384   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[23]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[23];
01385   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[24]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[24];
01386 
01387   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[25]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[25];
01388   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[26]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[26];
01389   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit_J1[27]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit_J1[27];
01390   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit_J3[27]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit_J3[27];
01391   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[28]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[28];
01392   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[29]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[29];
01393   
01394 
01395 
01396   
01397   
01398   //Drop two lowest bits for ETOT and OR Bits>6 with 6
01399   for (int i=0;i<kL1DsmModule;i++) {
01400     DSM1_ETOT_ADC[i]/=4;
01401     if (DSM1_ETOT_ADC[i]>31) DSM1_ETOT_ADC[i]=31;
01402   }
01403 
01404 
01405 #ifdef DEBUG
01406 
01407   if (mHeadMaker->GetDataSet("MuDst")) {
01408     StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
01409     static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
01410     static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
01411     for (int dsm = 0; dsm < kL2DsmModule; ++dsm) {
01412       for (int ch = 0; ch < 6; ++ch) {
01413         int idx = dsm_read_map[ch];
01414         int TrigBankOut = emcTrig.emcLayer2(idx);
01415         int jetPatch = 2 * TriggerBankToSimuMap[ch];
01416         int sum = DSM1_JP_ADC[jetPatch] + DSM1_JP_ADC[jetPatch+1];
01417         sum = (sum >> 7) ? 31 : (sum >> 2 & 0x1f);
01418         int diff = (TrigBankOut & 0x1f) - (sum & 0x1f);
01419         mBEMCLayer2PatchSum->Fill(ch, TrigBankOut & 0x1f);
01420         mBEMCLayer2PatchSumDiff->Fill(ch, diff);
01421         diff = (TrigBankOut >> 7 & 0x1) - (DSM1_HTTP_Bit[TriggerBankToSimuMap[ch]]);
01422         mBEMCLayer2HTTPBits->Fill(ch, TrigBankOut >> 7 & 0x1);
01423         mBEMCLayer2HTTPBitsDiff->Fill(ch,diff);
01424         diff = (TrigBankOut >> 9 & 0x1) - (DSM1_TP_Bit[TriggerBankToSimuMap[ch]]);
01425         mBEMCLayer2TPBits->Fill(ch, TrigBankOut >> 9 & 0x1);
01426         mBEMCLayer2TPBitsDiff->Fill(ch,diff);
01427         diff = (TrigBankOut >> 10 & 0x3) - (DSM1_JP_Bit[TriggerBankToSimuMap[ch]]);
01428         mBEMCLayer2JPBits->Fill(ch, TrigBankOut >> 10 & 0x3);
01429         mBEMCLayer2JPBitsDiff->Fill(ch, diff);
01430         diff = (TrigBankOut >> 12 & 0x3) - (DSM1_HTj0_Bit[TriggerBankToSimuMap[ch]]);
01431         mBEMCLayer2HTj0Bits->Fill(ch, TrigBankOut >> 12 & 0x3);
01432         mBEMCLayer2HTj0BitsDiff->Fill(ch,diff);
01433         diff = (TrigBankOut >> 14 & 0x3) - (DSM1_HTj1_Bit[TriggerBankToSimuMap[ch]]);
01434         mBEMCLayer2HTj1Bits->Fill(ch, TrigBankOut >> 14 & 0x3);
01435         mBEMCLayer2HTj1BitsDiff->Fill(ch,diff);
01436  
01437       }
01438     }
01439   }
01440 #endif
01441 
01442 }
01443 
01444 void StBemcTriggerSimu::get2006_DSMLayer2()
01445 {
01446 
01447   // In hardware the final trigger decisions are made in the TCU 
01448   // It is not possible to compare the emulator with the TCU input
01449   // so all final trigger decisions for the BEMC are made at Layer2 
01450   // in this code
01451 
01452   Int_t DSM2_JP_Bit=0;
01453   Int_t DSM2_HT_Bit=0;
01454   //Int_t DSM2_Esum_Bit=0;
01455   //Int_t DSM2_Topo_Bit=0;
01456   Int_t DSM2_HTTP_Bit=0;
01457   Int_t DSM2_TP_Bit=0;
01458 
01459     
01460   for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
01461 
01462     if (DSM2_JP_Bit<DSM1_JP_Bit[dsm]) DSM2_JP_Bit=DSM1_JP_Bit[dsm];
01463     if (DSM2_HTTP_Bit<DSM1_HTTP_Bit[dsm]) DSM2_HTTP_Bit=DSM1_HTTP_Bit[dsm];
01464     if (DSM2_HT_Bit<DSM1_HTj0_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj0_Bit[dsm];
01465     if (DSM2_HT_Bit<DSM1_HTj1_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj1_Bit[dsm];
01466     if (DSM2_TP_Bit<DSM1_TP_Bit[dsm]) DSM2_TP_Bit=DSM1_TP_Bit[dsm];
01467   }
01468   
01469   //HT
01470   if (DSM2_HT_Bit > 2){
01471     mFiredTriggers.push_back(127212);
01472     mFiredTriggers.push_back(137213);
01473   }
01474   
01475   //HTTP trigger
01476   if (DSM2_HTTP_Bit==1) {
01477       mFiredTriggers.push_back(127611);
01478       mFiredTriggers.push_back(127821);
01479       mFiredTriggers.push_back(137821);
01480       mFiredTriggers.push_back(137822);
01481       mFiredTriggers.push_back(137611);
01482       mFiredTriggers.push_back(5);
01483 
01484       // Upsilon triggers
01485       mFiredTriggers.push_back(117601);
01486       mFiredTriggers.push_back(117602);
01487       mFiredTriggers.push_back(137602);
01488       mFiredTriggers.push_back(137603);
01489     } 
01490 
01491 
01492   //JP Trigger
01493   if (DSM2_JP_Bit >= 1) {  
01494     mFiredTriggers.push_back(127501);
01495     mFiredTriggers.push_back(137501);
01496     mFiredTriggers.push_back(127622);
01497     mFiredTriggers.push_back(137622);
01498   }
01499   
01500   if (DSM2_JP_Bit >= 2) {
01501     mFiredTriggers.push_back(127221);
01502     mFiredTriggers.push_back(137221);
01503     mFiredTriggers.push_back(137222);
01504   }
01505 
01506   // J/psi topology trigger
01507   //
01508   // See http://www.star.bnl.gov/public/trg/TSL/Software/EMC_2006.pdf
01509   //
01510   // The J/psi trigger uses just the high tower threshold bits of the Barrel,
01511   // not the Endcap. R2 selects ONE of the high-tower thresholds for this trigger.
01512   // The J/psi trigger fires if two opposite jet patches have high towers
01513   // above the selected threshold.
01514   //
01515   // +-----------+----------+------------+------------+
01516   // | DSM index | DSM name | j0         | j1         |
01517   // +-----------+----------+------------+------------+
01518   // | 0         | BE101    | 10' (JP6)  | 12' (JP7)  |
01519   // | 1         | BE102    | 2'  (JP8)  | 4'  (JP9)  |
01520   // | 2         | BE103    | 6'  (JP10) | 8'  (JP11) |
01521   // | 3         | BW101    | 10' (JP0)  | 12' (JP1)  |
01522   // | 4         | BW102    | 2'  (JP2)  | 4'  (JP3)  |
01523   // | 5         | BW103    | 6'  (JP4)  | 8'  (JP5)  |
01524   // +-----------+----------+------------+------------+
01525   //
01526   // The J/psi topology trigger uses register R2 to select the
01527   // high tower threshold used for each decay electron of the J/psi.
01528   // In Run 6, R2 was always set to th0. So it is hardcoded to 1
01529   // in the code below. Possible values are:
01530   // 0 - th0; 1 - th1; 2 - th2; 3 - J/psi logic OFF.
01531   //
01532   // Vector bits (0-5) correspond to positions 2,4,6,8,10,12 o'clock.
01533 
01534   int barrel_east_ht_jpsi[6];
01535 
01536   barrel_east_ht_jpsi[0] = DSM1_HTj0_Bit[1] >= 1; // 2 o'clock
01537   barrel_east_ht_jpsi[1] = DSM1_HTj1_Bit[1] >= 1; // 4 o'clock
01538   barrel_east_ht_jpsi[2] = DSM1_HTj0_Bit[2] >= 1; // 6 o'clock
01539   barrel_east_ht_jpsi[3] = DSM1_HTj1_Bit[2] >= 1; // 8 o'clock
01540   barrel_east_ht_jpsi[4] = DSM1_HTj0_Bit[0] >= 1; // 10 o'clock
01541   barrel_east_ht_jpsi[5] = DSM1_HTj1_Bit[0] >= 1; // 12 o'clock
01542 
01543   int barrel_west_ht_jpsi[6];
01544 
01545   barrel_west_ht_jpsi[0] = DSM1_HTj0_Bit[4] >= 1; // 2 o'clock
01546   barrel_west_ht_jpsi[1] = DSM1_HTj1_Bit[4] >= 1; // 4 o'clock
01547   barrel_west_ht_jpsi[2] = DSM1_HTj0_Bit[5] >= 1; // 6 o'clock
01548   barrel_west_ht_jpsi[3] = DSM1_HTj1_Bit[5] >= 1; // 8 o'clock
01549   barrel_west_ht_jpsi[4] = DSM1_HTj0_Bit[3] >= 1; // 10 o'clock
01550   barrel_west_ht_jpsi[5] = DSM1_HTj1_Bit[3] >= 1; // 12 o'clock
01551 
01552   int ht_jpsi[6];
01553 
01554   for (int i = 0; i < 6; ++i) ht_jpsi[i] = barrel_east_ht_jpsi[i] || barrel_west_ht_jpsi[i];
01555 
01556   int jpsiTrigger = ((ht_jpsi[0] && (ht_jpsi[2] || ht_jpsi[3] || ht_jpsi[4])) ||
01557                      (ht_jpsi[1] && (ht_jpsi[3] || ht_jpsi[4] || ht_jpsi[5])) ||
01558                      (ht_jpsi[2] && (ht_jpsi[4] || ht_jpsi[5])) ||
01559                      (ht_jpsi[3] && ht_jpsi[5]));
01560 
01561   // jpsi-mb trigger
01562   if (jpsiTrigger) {
01563     mFiredTriggers.push_back(117705);
01564     mFiredTriggers.push_back(137705);
01565 
01566     // Collect all towers above threshold and group them
01567     // by phi position, i.e. 2, 4, ..., 12 o'clock.
01568     const int phipos[] = { 4, 5, 0, 1, 2, 3, 4, 5, 0, 1, 2, 3 }; // JP0-JP11
01569     vector<int> ht_jpsi_ids[6];
01570 
01571     for (int towerId = 1; towerId <= kNTowers; ++towerId) {
01572       int triggerPatch, dsm;
01573       mDecoder->GetTriggerPatchFromTowerId(towerId,triggerPatch);
01574       mDecoder->GetDSMFromTriggerPatch(triggerPatch,dsm);
01575 
01576       if (HT6bit_adc_holder[towerId-1] > mDbThres->GetHT_DSM0_threshold(dsm,timestamp,0)) {
01577         int jetPatch;
01578         mDecoder->GetJetPatchFromTowerId(towerId,jetPatch);
01579         ht_jpsi_ids[phipos[jetPatch]].push_back(towerId);
01580       }
01581     }
01582 
01583     // Make J/psi candidates
01584     get2006_JpsiCandidates(ht_jpsi_ids[0],ht_jpsi_ids[2]); // 2 o'clock and 6 o'clock
01585     get2006_JpsiCandidates(ht_jpsi_ids[0],ht_jpsi_ids[3]); // 2 o'clock and 8 o'clock
01586     get2006_JpsiCandidates(ht_jpsi_ids[0],ht_jpsi_ids[4]); // 2 o'clock and 10 o'clock
01587     get2006_JpsiCandidates(ht_jpsi_ids[1],ht_jpsi_ids[3]); // 4 o'clock and 8 o'clock
01588     get2006_JpsiCandidates(ht_jpsi_ids[1],ht_jpsi_ids[4]); // 4 o'clock and 10 o'clock
01589     get2006_JpsiCandidates(ht_jpsi_ids[1],ht_jpsi_ids[5]); // 4 o'clock and 12 o'clock
01590     get2006_JpsiCandidates(ht_jpsi_ids[2],ht_jpsi_ids[4]); // 6 o'clock and 10 o'clock
01591     get2006_JpsiCandidates(ht_jpsi_ids[2],ht_jpsi_ids[5]); // 6 o'clock and 12 o'clock
01592     get2006_JpsiCandidates(ht_jpsi_ids[3],ht_jpsi_ids[5]); // 8 o'clock and 12 o'clock
01593 
01594 #if 0
01595     LOG_INFO << "nJpsiCandidates = " << mJpsiCandidates.size() << endm;
01596 
01597     for (size_t i = 0; i < mJpsiCandidates.size(); ++i) {
01598       const pair<int,int>& towers = mJpsiCandidates[i];
01599       LOG_INFO << towers.first << " " << towers.second << endm;
01600     }
01601 #endif
01602   }
01603 }
01604 
01605 void StBemcTriggerSimu::get2006_JpsiCandidates(const vector<int>& towerIds1, const vector<int>& towerIds2)
01606 {
01607   for (size_t i = 0; i < towerIds1.size(); ++i)
01608     for (size_t j = 0; j < towerIds2.size(); ++j)
01609       mJpsiCandidates.push_back(make_pair(towerIds1[i],towerIds2[j]));
01610 }
01611 
01612 //==================================================
01613 //==================================================
01614 void StBemcTriggerSimu::get2007_DSMLayer0() {
01615 
01616   //0-(8)9 ADC sum Trigger Patches
01617   //10-11  HT threshold bits
01618   //12-13  TP threshold bits
01619   //14-15  HT&&TP threshold bits
01620 
01621   //Loop over modules
01622   int k=0;
01623   int DSM_TP[kL0DsmInputs];
01624   for (int i=0;i<kL0DsmModule;i++){
01625 
01626     //Zero out 16 bit L0 TP/HT/HTTP outputs for each module
01627     DSM0_TP_SUM[i]=0; 
01628     DSM0_HT_Bit[i]=0;
01629     DSM0_TP_Bit[i]=0;
01630     DSM0_HTTP_Bit[i]=0;
01631 
01632     DSM0_TP_SUM_J1[i]=0;
01633     DSM0_HT_Bit_J1[i]=0;
01634     DSM0_TP_Bit_J1[i]=0;
01635     DSM0_HTTP_Bit_J1[i]=0;
01636 
01637     DSM0_TP_SUM_J3[i]=0;
01638     DSM0_HT_Bit_J3[i]=0;
01639     DSM0_TP_Bit_J3[i]=0;
01640     DSM0_HTTP_Bit_J3[i]=0;
01641 
01642     //Zero out 16 bit L0 TP/HT/HTTP outputs for each L0 input
01643     for (int j=0;j<kL0DsmInputs;j++){ 
01644       DSM0_HT_tp_Bit[j]=0;
01645       DSM0_TP_tp_Bit[j]=0;
01646       DSM0_HTTP_tp_Bit[j]=0; 
01647       DSM0_HT_tp_Bit_J1[j]=0;
01648       DSM0_TP_tp_Bit_J1[j]=0;
01649       DSM0_HTTP_tp_Bit_J1[j]=0; 
01650       DSM0_HT_tp_Bit_J3[j]=0;
01651       DSM0_TP_tp_Bit_J3[j]=0;
01652       DSM0_HTTP_tp_Bit_J3[j]=0;      
01653     }
01654   
01655     //Get array of TPid# from DSM module#
01656     mDecoder->GetTriggerPatchesFromDSM(i,DSM_TP);
01657 
01658 #ifdef DEBUG
01659     // Overwrite input to BEMC layer 0 DSMs (output of BEMC FEEs)
01660     // with content of trigger bank from MuDst (data only).
01661     // First fill the Layer0 histograms with results from FEEout()
01662     if (mHeadMaker->GetDataSet("MuDst")) {
01663       StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
01664       for (int triggerPatch = 0; triggerPatch < kNPatches; ++triggerPatch) {
01665         mBEMCLayer0HT6bit->Fill(triggerPatch,emcTrig.highTower(triggerPatch));
01666         mBEMCLayer0TP6bit->Fill(triggerPatch,emcTrig.patch(triggerPatch));
01667         mBEMCLayer0HT6bitDiff->Fill(triggerPatch,emcTrig.highTower(triggerPatch)-L0_HT_ADC[triggerPatch]);
01668         mBEMCLayer0TP6bitDiff->Fill(triggerPatch,emcTrig.patch(triggerPatch)-L0_TP_ADC[triggerPatch]);
01669         L0_HT_ADC[triggerPatch] = emcTrig.highTower(triggerPatch);
01670         L0_TP_ADC[triggerPatch] = emcTrig.patch(triggerPatch); 
01671       }
01672     }
01673 #endif
01674     
01675 
01676     //Loop over 10 inputs to each module 
01677     for (int j=0;j<kL0DsmInputs;j++){
01678       
01679       int tpid=DSM_TP[j];
01680       int jpid=-1;
01681       int seq=-1;
01682       mDecoder->GetJetPatchAndSequenceFromTriggerPatch(tpid, jpid, seq); 
01683 
01684       //Skip modules 2,7,12,17,22,27 
01685       if (i%5!=2) {
01686         
01687         //apply HT thresholds to each HT adc in each TP
01688         if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit[j]=0;
01689         if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit[j]=1;
01690         if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit[j]=2;
01691         if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit[j]=3;
01692         
01693         if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit[j]=0;
01694         if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit[j]=1;
01695         if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit[j]=2;
01696         if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit[j]=3;
01697 
01698         //apply HTTP condition - TP&&HT
01699         if (DSM0_TP_tp_Bit[j] >= DSM0_HT_tp_Bit[j]) DSM0_HTTP_tp_Bit[j]=DSM0_HT_tp_Bit[j];
01700         if (DSM0_HT_tp_Bit[j] >= DSM0_TP_tp_Bit[j]) DSM0_HTTP_tp_Bit[j]=DSM0_TP_tp_Bit[j];
01701         //then || each input
01702         if (DSM0_HTTP_tp_Bit[j] > DSM0_HTTP_Bit[i]) DSM0_HTTP_Bit[i]=DSM0_HTTP_tp_Bit[j];
01703 
01704         //add up TP adc for 2/5 of JP
01705         DSM0_TP_SUM[i]+=L0_TP_ADC[tpid];
01706         
01707         if (DSM0_HT_Bit[i]< DSM0_HT_tp_Bit[j]) DSM0_HT_Bit[i]=DSM0_HT_tp_Bit[j];
01708         if (DSM0_TP_Bit[i]< DSM0_TP_tp_Bit[j]) DSM0_TP_Bit[i]=DSM0_TP_tp_Bit[j];
01709         if (DSM0_HTTP_Bit[i]< DSM0_HTTP_tp_Bit[j]) DSM0_HTTP_Bit[i]=DSM0_HTTP_tp_Bit[j];
01710       }
01711       
01712       //Loop over 2x5 inputs(TP) for modules 2,7,12,17,22,29
01713       if (i%5==2){
01714 
01715         if (j%2)
01716           {
01717             if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J3[j]=0;
01718             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J3[j]=1;
01719             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J3[j]=2;
01720             if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit_J3[j]=3;
01721           }
01722         else
01723           {
01724             if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J1[j]=0;
01725             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J1[j]=1;
01726             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J1[j]=2;
01727             if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit_J1[j]=3;
01728           }
01729         
01730         //apply TP thresholds to each TP adc in each TP
01731         if (j%2)
01732           {
01733             if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J3[j]=0;
01734             if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit_J3[j]=1;
01735             if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit_J3[j]=2;
01736             if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit_J3[j]=3;
01737           }                       
01738         else
01739           {
01740             if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J1[j]=0;
01741             if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit_J1[j]=1;
01742             if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit_J1[j]=2;
01743             if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit_J1[j]=3;
01744           }
01745         
01746         
01747         //apply HTTP condition - TP&&HT
01748         if (j%2) 
01749           {
01750             if (DSM0_TP_tp_Bit_J3[j] >= DSM0_HT_tp_Bit_J3[j]) DSM0_HTTP_tp_Bit_J3[j]=DSM0_HT_tp_Bit_J3[j];
01751             if (DSM0_HT_tp_Bit_J3[j] >= DSM0_TP_tp_Bit_J3[j]) DSM0_HTTP_tp_Bit_J3[j]=DSM0_TP_tp_Bit_J3[j];
01752             if (DSM0_HTTP_tp_Bit_J3[j] > DSM0_HTTP_Bit_J3[j]) DSM0_HTTP_Bit_J3[j]=DSM0_HTTP_tp_Bit_J3[j];
01753           }
01754         else
01755           {
01756             if (DSM0_TP_tp_Bit_J1[j] >= DSM0_HT_tp_Bit_J1[j]) DSM0_HTTP_tp_Bit_J1[j]=DSM0_HT_tp_Bit_J1[j];
01757             if (DSM0_HT_tp_Bit_J1[j] >= DSM0_TP_tp_Bit_J1[j]) DSM0_HTTP_tp_Bit_J1[j]=DSM0_TP_tp_Bit_J1[j];
01758             if (DSM0_HTTP_tp_Bit_J1[j] > DSM0_HTTP_Bit_J1[j]) DSM0_HTTP_Bit_J1[j]=DSM0_HTTP_tp_Bit_J1[j];
01759           }     
01760         
01761         
01762         //add up TP adc for 1/5 of JP
01763         if (j%2)
01764           DSM0_TP_SUM_J3[i]+=L0_TP_ADC[tpid];
01765         else
01766           DSM0_TP_SUM_J1[i]+=L0_TP_ADC[tpid];
01767         
01768         //apply HT/TP/HTTP thresholds to bits
01769         if (DSM0_HT_Bit_J1[i]< DSM0_HT_tp_Bit_J1[j]) DSM0_HT_Bit_J1[i]=DSM0_HT_tp_Bit_J1[j];
01770         if (DSM0_TP_Bit_J1[i]< DSM0_TP_tp_Bit_J1[j]) DSM0_TP_Bit_J1[i]=DSM0_TP_tp_Bit_J1[j];
01771         if (DSM0_HTTP_Bit_J1[i]< DSM0_HTTP_tp_Bit_J1[j]) DSM0_HTTP_Bit_J1[i]=DSM0_HTTP_tp_Bit_J1[j];
01772         if (DSM0_HT_Bit_J3[i]< DSM0_HT_tp_Bit_J3[j]) DSM0_HT_Bit_J3[i]=DSM0_HT_tp_Bit_J3[j];
01773         if (DSM0_TP_Bit_J3[i]< DSM0_TP_tp_Bit_J3[j]) DSM0_TP_Bit_J3[i]=DSM0_TP_tp_Bit_J3[j];
01774         if (DSM0_HTTP_Bit_J3[i]< DSM0_HTTP_tp_Bit_J3[j]) DSM0_HTTP_Bit_J3[i]=DSM0_HTTP_tp_Bit_J3[j];
01775         
01776       } 
01777     }
01778     
01779     //k==8 is the problem
01780     if (i%5!=2)
01781       {
01782         L0_16bit_Out[k]=0;
01783         L0_16bit_Out[k++]=DSM0_TP_SUM[i]+(DSM0_HT_Bit[i]<<10)+(DSM0_TP_Bit[i]<<12)+(DSM0_HTTP_Bit[i]<<14);
01784       }
01785     if (i%5==2)
01786       {
01787         L0_16bit_Out[k]=0;
01788         //cout<<k<<" DSM0_HT_Bit_J3="<<DSM0_HT_Bit_J3[i]<<endl;
01789         L0_16bit_Out[k++]=DSM0_TP_SUM_J3[i]+(DSM0_HT_Bit_J3[i]<<10)+(DSM0_TP_Bit_J3[i]<<12)+(DSM0_HTTP_Bit_J3[i]<<14);
01790         //cout<<k<<" DSM0_HT_Bit_J1="<<DSM0_HT_Bit_J1[i]<<endl;
01791         L0_16bit_Out[k++]=DSM0_TP_SUM_J1[i]+(DSM0_HT_Bit_J1[i]<<10)+(DSM0_TP_Bit_J1[i]<<12)+(DSM0_HTTP_Bit_J1[i]<<14);
01792 
01793       }
01794 
01795   }
01796 
01797 #ifdef DEBUG
01798 
01799   // Fill diagnostic histograms
01800   if (mHeadMaker->GetDataSet("MuDst")) {
01801     // BEMC layer 1 DSMs are stored in this order in the trigger bank:
01802     // BE101, BE102, BE103, BW101, BW102, BW103
01803     // DSM channels are read out in this order:
01804     static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
01805     // Trigger bank <-> Emulator ==> 0, 1, 2, 3, 4, 5 <-> 3, 4, 5, 0, 1, 2
01806     static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
01807     StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
01808 
01809     // Loop over BEMC layer 1 DSMs
01810     for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
01811       // Loop over layer 1 input channels
01812       for (int ch = 0; ch < kL1DsmInputs; ++ch) {
01813 
01814         Int_t idx = dsm*8+dsm_read_map[ch];
01815         Int_t TrigBankOut = emcTrig.bemcLayer1(idx);
01816         Int_t TPSumout = (TrigBankOut & 0x3ff);
01817         Int_t TPSumbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x3ff);
01818         Int_t HTout = (TrigBankOut & 0xc00)/0x400;
01819         Int_t HTbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc00)/0x400; 
01820         Int_t TPout = (TrigBankOut & 0x3000)/0x1000;
01821         Int_t TPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x3000)/0x1000;
01822         Int_t HTTPout = (TrigBankOut & 0xc000)/0x4000;
01823         Int_t HTTPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc000)/0x4000;
01824         int TPSumdiff = (TPSumbits)-(TPSumout);
01825         int HTdiff = (HTbits) - (HTout);
01826         int TPdiff = (TPbits) - (TPout);
01827         int HTTPdiff = (HTTPbits) - (HTTPout);
01828         mBEMCLayer1PatchSum->Fill(dsm*6+ch, TPSumout);
01829         mBEMCLayer1HTBits->Fill(dsm*6+ch, HTout);       
01830         mBEMCLayer1TPBits->Fill(dsm*6+ch, TPout);
01831         mBEMCLayer1HTTPBits->Fill(dsm*6+ch, HTTPout);
01832         mBEMCLayer1PatchSumDiff->Fill(dsm*6+ch, TPSumdiff);
01833         mBEMCLayer1HTBitsDiff->Fill(dsm*6+ch, HTdiff);
01834         mBEMCLayer1TPBitsDiff->Fill(dsm*6+ch, TPdiff);
01835         mBEMCLayer1HTTPBitsDiff->Fill(dsm*6+ch, HTTPdiff);  
01836 
01837       }
01838     }
01839   }
01840 #endif
01841 
01842 }
01843 
01844 
01845 //==================================================
01846 //==================================================
01847 void StBemcTriggerSimu::get2007_DSMLayer1(){
01848 
01849 
01850   //DSM_Layer0 is passed to DSM_Layer1 in 8 UShort blocks (16 bits)
01851   //There are 6 DSM_Layer1 boards and each can take 120 bits total
01852   //So DSM_Layer0 passes 8 shorts (16*8=128) or 128 bits to each DSM_Layer1
01853 
01854   //Zero out the DSMLayer1 Bits passed to DSMLayer2
01855   for (int i=0;i<kL1DsmModule;i++){
01856     DSM1_JP_Bit[i]=0;
01857     DSM1_HTj0_Bit[i]=0;
01858     DSM1_HTj1_Bit[i]=0;
01859     DSM1_TP_Bit[i]=0;
01860     DSM1_HTTP_Bit[i]=0;
01861     DSM1_ETOT_ADC[i]=0;
01862   }
01863 
01864 
01865 #ifdef DEBUG
01866     // Overwrite input to BEMC layer 1 DSMs (output of BEMC layer 0 DSMs)
01867     // with content of trigger bank from MuDst (data only).
01868     if (mHeadMaker->GetDataSet("MuDst")) {
01869       static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
01870       static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
01871       StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
01872       for (int dsm = 0; dsm < 6; ++dsm) {
01873         int offset = TriggerBankToSimuMap[dsm]*5;
01874         DSM0_TP_SUM   [offset+0] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[0]) & 0x3ff;
01875         DSM0_TP_SUM   [offset+1] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[1]) & 0x3ff;
01876         DSM0_TP_SUM_J3[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[2]) & 0x1ff;
01877         DSM0_TP_SUM_J1[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[3]) & 0x1ff;
01878         DSM0_TP_SUM   [offset+3] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[4]) & 0x3ff;
01879         DSM0_TP_SUM   [offset+4] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[5]) & 0x3ff;
01880       }
01881     }
01882 #endif
01883     
01884   //Sum TP ADC into JP's
01885   // West
01886   DSM1_JP_ADC[0]=DSM0_TP_SUM[0]+DSM0_TP_SUM[1]+DSM0_TP_SUM_J3[2];
01887   DSM1_JP_ADC[1]=DSM0_TP_SUM[3]+DSM0_TP_SUM[4]+DSM0_TP_SUM_J1[2];
01888   DSM1_JP_ADC[2]=DSM0_TP_SUM[5]+DSM0_TP_SUM[6]+DSM0_TP_SUM_J3[7];
01889   DSM1_JP_ADC[3]=DSM0_TP_SUM[8]+DSM0_TP_SUM[9]+DSM0_TP_SUM_J1[7];
01890   DSM1_JP_ADC[4]=DSM0_TP_SUM[10]+DSM0_TP_SUM[11]+DSM0_TP_SUM_J3[12];
01891   DSM1_JP_ADC[5]=DSM0_TP_SUM[13]+DSM0_TP_SUM[14]+DSM0_TP_SUM_J1[12];
01892   
01893   // East
01894   DSM1_JP_ADC[6]=DSM0_TP_SUM[15]+DSM0_TP_SUM[16]+DSM0_TP_SUM_J1[17];
01895   DSM1_JP_ADC[7]=DSM0_TP_SUM[18]+DSM0_TP_SUM[19]+DSM0_TP_SUM_J3[17];
01896   DSM1_JP_ADC[8]=DSM0_TP_SUM[20]+DSM0_TP_SUM[21]+DSM0_TP_SUM_J1[22];
01897   DSM1_JP_ADC[9]=DSM0_TP_SUM[23]+DSM0_TP_SUM[24]+DSM0_TP_SUM_J3[22];
01898   DSM1_JP_ADC[10]=DSM0_TP_SUM[25]+DSM0_TP_SUM[26]+DSM0_TP_SUM_J1[27];
01899   DSM1_JP_ADC[11]=DSM0_TP_SUM[28]+DSM0_TP_SUM[29]+DSM0_TP_SUM_J3[27];
01900  
01901   for (int hh=0;hh<12;hh++) JP_adc_holder[hh]=DSM1_JP_ADC[hh];
01902   
01903   //Test each JP and see if it passed
01904   for (int i=0;i<kNJet;i++)
01905     {
01906       DSM1_JP_jp_Bit[i]=0;
01907       if ( DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,0)) DSM1_JP_jp_Bit[i]=0;
01908       if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,1)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,0))) DSM1_JP_jp_Bit[i]=1;
01909       if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,1))) DSM1_JP_jp_Bit[i]=2;
01910       if ( DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) DSM1_JP_jp_Bit[i]=3;
01911     }  
01912 
01913 
01914   int mod;
01915   //Translate JP's into 2 bits to pass to DSMLayer2
01916   for (int i=0;i<kNJet;i++){
01917     if (i < (kNJet/2)) mod = 0;
01918     else mod = 1;
01919     DSM1_ETOT_ADC[mod]+=DSM1_JP_ADC[i];
01920     if ( DSM1_JP_Bit[i/2] < DSM1_JP_jp_Bit[i]) DSM1_JP_Bit[i/2]=DSM1_JP_jp_Bit[i];   
01921   }
01922 
01923 
01924   //HTTP and TP bits
01925   for (int i=0; i<kL1DsmModule; i++){
01926     for (int j=0; j<5; j++){
01927       int k= i*5 + j;
01928       int kk=i*5 + 2;
01929       if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit[k]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit[k];   
01930       if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J3[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J3[kk];   
01931       if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J1[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J1[kk];
01932       if ( DSM1_TP_Bit[i] < DSM0_TP_Bit[k]) DSM1_TP_Bit[i]=DSM0_TP_Bit[k];      
01933       if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J3[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J3[kk];   
01934       if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J1[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J1[kk];         
01935     }
01936 
01937     if (DSM1_HTTP_Bit[i]>=2) DSM1_HTTP_Bit[i]=1;
01938     else if (DSM1_HTTP_Bit[i]<2) DSM1_HTTP_Bit[i]=0;
01939 
01940     if (DSM1_TP_Bit[i]>=2) DSM1_TP_Bit[i]=1;
01941     else if (DSM1_TP_Bit[i]<2) DSM1_TP_Bit[i]=0;
01942   }
01943 
01944 
01945   //WEST  HT bits
01946   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[0]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[0];
01947   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[1]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[1];
01948   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit_J3[2]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit_J3[2];
01949   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit_J1[2]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit_J1[2];
01950   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[3]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[3];
01951   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[4]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[4];
01952 
01953   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[5]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[5];
01954   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[6]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[6];
01955   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit_J3[7]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit_J3[7];
01956   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit_J1[7]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit_J1[7];
01957   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[8]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[8];
01958   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[9]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[9];
01959 
01960   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[10]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[10];
01961   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[11]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[11];
01962   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit_J3[12]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit_J3[12];
01963   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit_J1[12]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit_J1[12];
01964   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[13]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[13];
01965   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[14]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[14];
01966 
01967   //EAST HT bits
01968   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[15]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[15];
01969   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[16]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[16];
01970   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit_J1[17]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit_J1[17];
01971   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit_J3[17]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit_J3[17];
01972   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[18]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[18];
01973   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[19]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[19];
01974 
01975   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[20]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[20];
01976   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[21]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[21];
01977   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit_J1[22]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit_J1[22];
01978   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit_J3[22]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit_J3[22];
01979   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[23]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[23];
01980   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[24]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[24];
01981 
01982   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[25]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[25];
01983   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[26]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[26];
01984   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit_J1[27]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit_J1[27];
01985   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit_J3[27]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit_J3[27];
01986   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[28]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[28];
01987   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[29]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[29];
01988   
01989 
01990 
01991   
01992   
01993   //Drop two lowest bits for ETOT and OR Bits>6 with 6
01994   for (int i=0;i<kL1DsmModule;i++) {
01995     DSM1_ETOT_ADC[i]/=4;
01996     if (DSM1_ETOT_ADC[i]>31) DSM1_ETOT_ADC[i]=31;
01997   }
01998 
01999 
02000 #ifdef DEBUG
02001 
02002   if (mHeadMaker->GetDataSet("MuDst")) {
02003     StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
02004     static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
02005     static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
02006     for (int dsm = 0; dsm < kL2DsmModule; ++dsm) {
02007       for (int ch = 0; ch < 6; ++ch) {
02008         int idx = dsm_read_map[ch];
02009         int TrigBankOut = emcTrig.emcLayer2(idx);
02010         int jetPatch = 2 * TriggerBankToSimuMap[ch];
02011         int sum = DSM1_JP_ADC[jetPatch] + DSM1_JP_ADC[jetPatch+1];
02012         sum = (sum >> 7) ? 31 : (sum >> 2 & 0x1f);
02013         int diff = (TrigBankOut & 0x1f) - (sum & 0x1f);
02014         mBEMCLayer2PatchSum->Fill(ch, TrigBankOut & 0x1f);
02015         mBEMCLayer2PatchSumDiff->Fill(ch, diff);
02016         diff = (TrigBankOut >> 7 & 0x1) - (DSM1_HTTP_Bit[TriggerBankToSimuMap[ch]]);
02017         mBEMCLayer2HTTPBits->Fill(ch, TrigBankOut >> 7 & 0x1);
02018         mBEMCLayer2HTTPBitsDiff->Fill(ch,diff);
02019         diff = (TrigBankOut >> 9 & 0x1) - (DSM1_TP_Bit[TriggerBankToSimuMap[ch]]);
02020         mBEMCLayer2TPBits->Fill(ch, TrigBankOut >> 9 & 0x1);
02021         mBEMCLayer2TPBitsDiff->Fill(ch,diff);
02022         diff = (TrigBankOut >> 10 & 0x3) - (DSM1_JP_Bit[TriggerBankToSimuMap[ch]]);
02023         mBEMCLayer2JPBits->Fill(ch, TrigBankOut >> 10 & 0x3);
02024         mBEMCLayer2JPBitsDiff->Fill(ch, diff);
02025         diff = (TrigBankOut >> 12 & 0x3) - (DSM1_HTj0_Bit[TriggerBankToSimuMap[ch]]);
02026         mBEMCLayer2HTj0Bits->Fill(ch, TrigBankOut >> 12 & 0x3);
02027         mBEMCLayer2HTj0BitsDiff->Fill(ch,diff);
02028         diff = (TrigBankOut >> 14 & 0x3) - (DSM1_HTj1_Bit[TriggerBankToSimuMap[ch]]);
02029         mBEMCLayer2HTj1Bits->Fill(ch, TrigBankOut >> 14 & 0x3);
02030         mBEMCLayer2HTj1BitsDiff->Fill(ch,diff);
02031  
02032       }
02033     }
02034   }
02035 #endif
02036 
02037 }
02038 
02039 void StBemcTriggerSimu::get2007_DSMLayer2()
02040 {
02041 
02042   // In hardware the final trigger decisions are made in the TCU 
02043   // It is not possible to compare the emulator with the TCU input
02044   // so all final trigger decisions for the BEMC are made at Layer2 
02045   // in this code
02046 
02047   Int_t DSM2_JP_Bit=0;
02048   Int_t DSM2_HT_Bit=0;
02049   Int_t DSM2_HTTP_Bit=0;
02050   Int_t DSM2_TP_Bit=0;
02051 
02052     
02053   for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
02054 
02055     if (DSM2_JP_Bit<DSM1_JP_Bit[dsm]) DSM2_JP_Bit=DSM1_JP_Bit[dsm];
02056     if (DSM2_HTTP_Bit<DSM1_HTTP_Bit[dsm]) DSM2_HTTP_Bit=DSM1_HTTP_Bit[dsm];
02057     if (DSM2_HT_Bit<DSM1_HTj0_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj0_Bit[dsm];
02058     if (DSM2_HT_Bit<DSM1_HTj1_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj1_Bit[dsm];
02059     if (DSM2_TP_Bit<DSM1_TP_Bit[dsm]) DSM2_TP_Bit=DSM1_TP_Bit[dsm];
02060   }
02061   
02062   //HT
02063   if (DSM2_HT_Bit > 1){
02064     mFiredTriggers.push_back(200601);
02065     mFiredTriggers.push_back(200602);
02066     mFiredTriggers.push_back(200213);
02067     mFiredTriggers.push_back(200214);
02068     
02069   }
02070 
02071   if (DSM2_HT_Bit > 2){
02072     mFiredTriggers.push_back(200211);
02073     mFiredTriggers.push_back(200212);
02074     mFiredTriggers.push_back(200220);
02075     mFiredTriggers.push_back(200221);
02076     mFiredTriggers.push_back(200222);
02077     mFiredTriggers.push_back(200620);
02078     mFiredTriggers.push_back(200621);
02079   }
02080   
02081 }
02082 
02083 
02084 
02085 //==================================================
02086 //==================================================
02087 void StBemcTriggerSimu::get2008dAu_DSMLayer0() {
02088   
02089   //0-(8)9 Unused
02090   //10-11  First 2 HT threshold bits encoded into 2 bits
02091   //12     High Tower bit for threshold 3
02092   //13     Masked high tower bit for threshold 4
02093   //14-15  Unused
02094  
02095   //Loop over modules
02096   int k=0;
02097   int DSM_TP[kL0DsmInputs];
02098   for (int i=0;i<kL0DsmModule;i++){
02099 
02100     //Zero out 16 bit L0 HT outputs for each module
02101     DSM0_HT_Bit[i]=0;
02102     DSM0_HT_2Bit[i]=0;
02103     DSM0_HT_Thr3_Bit[i]=0;
02104     DSM0_HT_Masked_Bit[i]=0;
02105     DSM0_HT_Bit_J1[i]=0;
02106     DSM0_HT_2Bit_J1[i]=0;
02107     DSM0_HT_Thr3_Bit_J1[i]=0;
02108     DSM0_HT_Masked_Bit_J1[i]=0;
02109     DSM0_HT_Bit_J3[i]=0;  
02110     DSM0_HT_2Bit_J3[i]=0;
02111     DSM0_HT_Thr3_Bit_J3[i]=0;
02112     DSM0_HT_Masked_Bit_J3[i]=0;
02113 
02114     //Zero out 16 bit L0 TP/HT/HTTP outputs for each L0 input
02115     for (int j=0;j<kL0DsmInputs;j++){ 
02116       DSM0_HT_tp_Bit[j]=0;
02117       DSM0_HT_tp_Bit_J1[j]=0;
02118       DSM0_HT_tp_Bit_J3[j]=0;
02119     }
02120   
02121     //Get array of TPid# from DSM module#
02122     mDecoder->GetTriggerPatchesFromDSM(i,DSM_TP);
02123     
02124 #ifdef DEBUG
02125     // Overwrite input to BEMC layer 0 DSMs (output of BEMC FEEs)
02126     // with content of trigger bank from MuDst (data only).
02127     // First fill the Layer0 histograms with results from FEEout()
02128     if (mHeadMaker->GetDataSet("MuDst")) {
02129       StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
02130       for (int triggerPatch = 0; triggerPatch < kNPatches; ++triggerPatch) {
02131         mBEMCLayer0HT6bit->Fill(triggerPatch,emcTrig.highTower(triggerPatch));
02132         mBEMCLayer0TP6bit->Fill(triggerPatch,emcTrig.patch(triggerPatch));
02133         mBEMCLayer0HT6bitDiff->Fill(triggerPatch,emcTrig.highTower(triggerPatch)-L0_HT_ADC[triggerPatch]);
02134         mBEMCLayer0TP6bitDiff->Fill(triggerPatch,emcTrig.patch(triggerPatch)-L0_TP_ADC[triggerPatch]);
02135         L0_HT_ADC[triggerPatch] = emcTrig.highTower(triggerPatch);
02136         L0_TP_ADC[triggerPatch] = emcTrig.patch(triggerPatch); 
02137       }
02138     }
02139 #endif
02140     
02141 
02142     //Loop over 10 inputs to each module 
02143     for (int j=0;j<kL0DsmInputs;j++){
02144       
02145       int tpid=DSM_TP[j];
02146       int jpid=-1;
02147       int seq=-1;
02148       mDecoder->GetJetPatchAndSequenceFromTriggerPatch(tpid, jpid, seq); 
02149 
02150       //Skip modules 2,7,12,17,22,27 
02151       if (i%5!=2) {
02152         
02153         //apply 5 HT thresholds to each HT adc in each TP
02154         if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit[j]=0;
02155         if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit[j]=1;
02156         if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit[j]=2;
02157         if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit[j]=3;
02158         if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3))) DSM0_HT_tp_Bit[j]=4;
02159         if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) DSM0_HT_tp_Bit[j]=5;
02160         
02161         //if all 6 bits are high then input is ignored
02162         if (L0_HT_ADC[tpid]==63) DSM0_HT_tp_Bit[j]=0;
02163                 
02164         //Or threshold bits for all 10 high-towers
02165         if (DSM0_HT_Bit[i]< DSM0_HT_tp_Bit[j]) DSM0_HT_Bit[i]=DSM0_HT_tp_Bit[j];
02166 
02167       }
02168       
02169       //Loop over 2x5 inputs(TP) for modules 2,7,12,17,22,29
02170       if (i%5==2){
02171 
02172         if (j%2)
02173           {
02174             if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J3[j]=0;
02175             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J3[j]=1;
02176             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J3[j]=2;
02177             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit_J3[j]=3;
02178             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3))) DSM0_HT_tp_Bit_J3[j]=4;
02179             if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) DSM0_HT_tp_Bit_J3[j]=5;
02180           }
02181         else
02182           {
02183             if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J1[j]=0;
02184             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J1[j]=1;
02185             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J1[j]=2;
02186             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit_J1[j]=3;
02187             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3))) DSM0_HT_tp_Bit_J1[j]=4;
02188             if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) DSM0_HT_tp_Bit_J1[j]=5;
02189           }
02190         
02191         //if all 6 bits are high then input is ignored
02192         if (L0_HT_ADC[tpid]==63) DSM0_HT_tp_Bit_J1[j]=0;
02193         if (L0_HT_ADC[tpid]==63) DSM0_HT_tp_Bit_J3[j]=0;
02194         
02195         //Or threshold bits for all 10 high-towers
02196         if (DSM0_HT_Bit_J1[i]< DSM0_HT_tp_Bit_J1[j]) DSM0_HT_Bit_J1[i]=DSM0_HT_tp_Bit_J1[j];
02197         if (DSM0_HT_Bit_J3[i]< DSM0_HT_tp_Bit_J3[j]) DSM0_HT_Bit_J3[i]=DSM0_HT_tp_Bit_J3[j];     
02198       }
02199     }
02200     
02201     
02202     //Code first three thresholds (0-2) into 2 bits
02203     DSM0_HT_2Bit[i]=DSM0_HT_Bit[i];
02204     DSM0_HT_2Bit_J1[i]=DSM0_HT_Bit_J1[i];
02205     DSM0_HT_2Bit_J3[i]=DSM0_HT_Bit_J3[i];
02206     if (DSM0_HT_Bit[i]>3) DSM0_HT_2Bit[i]=3;
02207     if (DSM0_HT_Bit_J1[i]>3) DSM0_HT_2Bit_J1[i]=3;
02208     if (DSM0_HT_Bit_J3[i]>3) DSM0_HT_2Bit_J3[i]=3;
02209 
02210     //HT bit for threshold 3
02211     if (DSM0_HT_Bit[i]>=4) DSM0_HT_Thr3_Bit[i]=1;
02212     if (DSM0_HT_Bit_J1[i]>=4) DSM0_HT_Thr3_Bit_J1[i]=1;
02213     if (DSM0_HT_Bit_J3[i]>=4) DSM0_HT_Thr3_Bit_J3[i]=1;
02214     
02215     //Or between highest threshold and R5
02216     if (DSM0_HT_Bit[i]==5) DSM0_HT_Masked_Bit[i]=1;
02217     if (DSM0_HT_Bit_J1[i]==5) DSM0_HT_Masked_Bit_J1[i]=1;
02218     if (DSM0_HT_Bit_J3[i]==5) DSM0_HT_Masked_Bit_J3[i]=1;
02219  
02220     if (i%5!=2)
02221       {
02222         L0_16bit_Out[k]=0;
02223         L0_16bit_Out[k++]=(DSM0_HT_2Bit[i]<<10)+(DSM0_HT_Thr3_Bit[i]<<12)+(DSM0_HT_Masked_Bit[i]<<13);
02224       }
02225     if (i%5==2)
02226       {
02227         L0_16bit_Out[k]=0;
02228         L0_16bit_Out[k++]=(DSM0_HT_2Bit_J3[i]<<10)+(DSM0_HT_Thr3_Bit_J3[i]<<12)+(DSM0_HT_Masked_Bit_J3[i]<<13);
02229         L0_16bit_Out[k++]=(DSM0_HT_2Bit_J1[i]<<10)+(DSM0_HT_Thr3_Bit_J1[i]<<12)+(DSM0_HT_Masked_Bit_J1[i]<<13);
02230       }
02231 
02232   }
02233 
02234 #ifdef DEBUG
02235 
02236   // Fill diagnostic histograms
02237   if (mHeadMaker->GetDataSet("MuDst")) {
02238     // BEMC layer 1 DSMs are stored in this order in the trigger bank:
02239     // BE101, BE102, BE103, BW101, BW102, BW103
02240     // DSM channels are read out in this order:
02241     static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
02242     // Trigger bank <-> Emulator ==> 0, 1, 2, 3, 4, 5 <-> 3, 4, 5, 0, 1, 2
02243     static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
02244     StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
02245 
02246     // Loop over BEMC layer 1 DSMs
02247     for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
02248       // Loop over layer 1 input channels
02249       for (int ch = 0; ch < kL1DsmInputs; ++ch) {
02250 
02251         Int_t idx = dsm*8+dsm_read_map[ch];
02252         Int_t TrigBankOut = emcTrig.bemcLayer1(idx);
02253         Int_t HTout = (TrigBankOut & 0xc00)/0x400;
02254         Int_t HTbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc00)/0x400; 
02255         Int_t HTthr3out = (TrigBankOut & 0x1000)/0x1000;
02256         Int_t HTthr3bit = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x1000)/0x1000;
02257         Int_t HTmaskout = (TrigBankOut & 0x2000)/0x2000;
02258         Int_t HTmaskbit = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x2000)/0x2000;
02259         int HTdiff = (HTbits) - (HTout);
02260         int HTthr3diff = (HTthr3out) - (HTthr3bit);
02261         int HTmaskdiff = (HTmaskout) - (HTmaskbit);
02262         mBEMCLayer1HTBits->Fill(dsm*6+ch, HTout);       
02263         mBEMCLayer1HTthr3Bits->Fill(dsm*6+ch, HTthr3out);
02264         mBEMCLayer1HTmaskBits->Fill(dsm*6+ch, HTmaskout);
02265         mBEMCLayer1HTBitsDiff->Fill(dsm*6+ch, HTdiff);
02266         mBEMCLayer1HTthr3Diff->Fill(dsm*6+ch, HTthr3diff);
02267         mBEMCLayer1HTmaskDiff->Fill(dsm*6+ch, HTmaskdiff);  
02268       }
02269     }
02270   }
02271 #endif
02272 
02273 
02274 }
02275 
02276 
02277 //==================================================
02278 //==================================================
02279 void StBemcTriggerSimu::get2008dAu_DSMLayer1(){
02280 
02281   //DSM_Layer0 is passed to DSM_Layer1 in 8 UShort blocks (16 bits)
02282   //There are 6 DSM_Layer1 boards and each can take 120 bits total
02283   //So DSM_Layer0 passes 8 shorts (16*8=128) or 128 bits to each DSM_Layer1
02284 
02285   //Zero out the DSMLayer1 Bits passed to DSMLayer2
02286   for (int i=0;i<kL1DsmModule;i++){
02287     DSM1_HTj0_Bit[i]=0;
02288     DSM1_HTj1_Bit[i]=0;
02289   }
02290 
02291 
02292 #ifdef DEBUG
02293     // Overwrite input to BEMC layer 1 DSMs (output of BEMC layer 0 DSMs)
02294     // with content of trigger bank from MuDst (data only).
02295     if (mHeadMaker->GetDataSet("MuDst")) {
02296       static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
02297       static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
02298       StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
02299       for (int dsm = 0; dsm < 6; ++dsm) {
02300         int offset = TriggerBankToSimuMap[dsm]*5;
02301         DSM0_TP_SUM   [offset+0] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[0]) & 0x3ff;
02302         DSM0_TP_SUM   [offset+1] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[1]) & 0x3ff;
02303         DSM0_TP_SUM_J3[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[2]) & 0x1ff;
02304         DSM0_TP_SUM_J1[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[3]) & 0x1ff;
02305         DSM0_TP_SUM   [offset+3] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[4]) & 0x3ff;
02306         DSM0_TP_SUM   [offset+4] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[5]) & 0x3ff;
02307       }
02308     }
02309 #endif
02310     
02311 
02312   //WEST  HT bits
02313   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[0]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[0];
02314   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[1]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[1];
02315   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit_J3[2]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit_J3[2];
02316   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit_J1[2]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit_J1[2];
02317   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[3]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[3];
02318   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[4]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[4];
02319 
02320   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[5]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[5];
02321   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[6]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[6];
02322   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit_J3[7]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit_J3[7];
02323   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit_J1[7]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit_J1[7];
02324   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[8]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[8];
02325   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[9]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[9];
02326 
02327   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[10]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[10];
02328   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[11]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[11];
02329   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit_J3[12]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit_J3[12];
02330   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit_J1[12]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit_J1[12];
02331   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[13]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[13];
02332   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[14]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[14];
02333 
02334   //EAST HT bits
02335   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[15]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[15];
02336   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[16]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[16];
02337   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit_J1[17]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit_J1[17];
02338   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit_J3[17]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit_J3[17];
02339   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[18]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[18];
02340   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[19]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[19];
02341 
02342   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[20]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[20];
02343   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[21]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[21];
02344   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit_J1[22]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit_J1[22];
02345   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit_J3[22]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit_J3[22];
02346   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[23]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[23];
02347   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[24]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[24];
02348 
02349   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[25]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[25];
02350   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[26]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[26];
02351   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit_J1[27]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit_J1[27];
02352   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit_J3[27]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit_J3[27];
02353   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[28]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[28];
02354   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[29]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[29];
02355     
02356 
02357 #ifdef DEBUG
02358 
02359   if (mHeadMaker->GetDataSet("MuDst")) {
02360     StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
02361     static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
02362     static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
02363     for (int dsm = 0; dsm < kL2DsmModule; ++dsm) {
02364       for (int ch = 0; ch < 6; ++ch) {
02365         int idx = dsm_read_map[ch];
02366         int TrigBankOut = emcTrig.emcLayer2(idx);
02367         int jetPatch = 2 * TriggerBankToSimuMap[ch];
02368         int sum = DSM1_JP_ADC[jetPatch] + DSM1_JP_ADC[jetPatch+1];
02369         sum = (sum >> 7) ? 31 : (sum >> 2 & 0x1f);
02370         int diff = (TrigBankOut & 0x1f) - (sum & 0x1f);
02371         mBEMCLayer2PatchSum->Fill(ch, TrigBankOut & 0x1f);
02372         mBEMCLayer2PatchSumDiff->Fill(ch, diff);
02373         diff = (TrigBankOut >> 7 & 0x1) - (DSM1_HTTP_Bit[TriggerBankToSimuMap[ch]]);
02374         mBEMCLayer2HTTPBits->Fill(ch, TrigBankOut >> 7 & 0x1);
02375         mBEMCLayer2HTTPBitsDiff->Fill(ch,diff);
02376         diff = (TrigBankOut >> 9 & 0x1) - (DSM1_TP_Bit[TriggerBankToSimuMap[ch]]);
02377         mBEMCLayer2TPBits->Fill(ch, TrigBankOut >> 9 & 0x1);
02378         mBEMCLayer2TPBitsDiff->Fill(ch,diff);
02379         diff = (TrigBankOut >> 10 & 0x3) - (DSM1_JP_Bit[TriggerBankToSimuMap[ch]]);
02380         mBEMCLayer2JPBits->Fill(ch, TrigBankOut >> 10 & 0x3);
02381         mBEMCLayer2JPBitsDiff->Fill(ch, diff);
02382         diff = (TrigBankOut >> 12 & 0x3) - (DSM1_HTj0_Bit[TriggerBankToSimuMap[ch]]);
02383         mBEMCLayer2HTj0Bits->Fill(ch, TrigBankOut >> 12 & 0x3);
02384         mBEMCLayer2HTj0BitsDiff->Fill(ch,diff);
02385         diff = (TrigBankOut >> 14 & 0x3) - (DSM1_HTj1_Bit[TriggerBankToSimuMap[ch]]);
02386         mBEMCLayer2HTj1Bits->Fill(ch, TrigBankOut >> 14 & 0x3);
02387         mBEMCLayer2HTj1BitsDiff->Fill(ch,diff);
02388  
02389       }
02390     }
02391   }
02392 #endif
02393 
02394 }
02395 
02396 //==================================================
02397 //==================================================
02398 void StBemcTriggerSimu::get2008dAu_DSMLayer2(){
02399 
02400   // In hardware the final trigger decisions are made in the TCU 
02401   // It is not possible to compare the emulator with the TCU input
02402   // so all final trigger decisions for the BEMC are made at Layer2 
02403   // in this code
02404 
02405   Int_t DSM2_HT_Bit=0;
02406     
02407   for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
02408     if (DSM2_HT_Bit<DSM1_HTj0_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj0_Bit[dsm];
02409     if (DSM2_HT_Bit<DSM1_HTj1_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj1_Bit[dsm];
02410   }
02411   
02412   //HT0
02413   if (DSM2_HT_Bit > 0){
02414     mFiredTriggers.push_back(210500);
02415     mFiredTriggers.push_back(210501);
02416   }
02417   //HT1
02418   if (DSM2_HT_Bit > 1){
02419     mFiredTriggers.push_back(210510);
02420     mFiredTriggers.push_back(210511);
02421   }
02422   //HT2
02423   if (DSM2_HT_Bit > 2){
02424     mFiredTriggers.push_back(210520);
02425     mFiredTriggers.push_back(210521);
02426   }
02427   //HT4
02428   if (DSM2_HT_Bit > 4){
02429     mFiredTriggers.push_back(210541);
02430   }
02431 
02432 }
02433 
02434 
02435 //==================================================
02436 //==================================================
02437 void StBemcTriggerSimu::get2008pp_DSMLayer0() {
02438 
02439   //0-(8)9 ADC sum Trigger Patches
02440   //10-11  HT threshold bits
02441   //12-13  TP threshold bits
02442   //14-15  HT&&TP threshold bits
02443 
02444   //Loop over modules
02445   int k=0;
02446   int DSM_TP[kL0DsmInputs];
02447   for (int i=0;i<kL0DsmModule;i++){
02448 
02449     //Zero out 16 bit L0 TP/HT/HTTP outputs for each module
02450     DSM0_TP_SUM[i]=0; 
02451     DSM0_HT_Thr3_Bit[i]=0;
02452     DSM0_HT_Bit[i]=0;
02453     DSM0_TP_Bit[i]=0;
02454     DSM0_HTTP_Bit[i]=0;
02455 
02456     DSM0_TP_SUM_J1[i]=0;
02457     DSM0_HT_Thr3_Bit_J1[i]=0;
02458     DSM0_HT_Bit_J1[i]=0;
02459     DSM0_TP_Bit_J1[i]=0;
02460     DSM0_HTTP_Bit_J1[i]=0;
02461 
02462     DSM0_TP_SUM_J3[i]=0;
02463     DSM0_HT_Thr3_Bit_J3[i]=0;
02464     DSM0_HT_Bit_J3[i]=0;
02465     DSM0_TP_Bit_J3[i]=0;
02466     DSM0_HTTP_Bit_J3[i]=0;
02467    
02468 
02469     //Zero out 16 bit L0 TP/HT/HTTP outputs for each L0 input
02470     for (int j=0;j<kL0DsmInputs;j++){ 
02471       DSM0_HT_tp_Bit[j]=0;
02472       DSM0_HT_Thr3_tp_Bit[j]=0;
02473       DSM0_TP_tp_Bit[j]=0;
02474       DSM0_HTTP_tp_Bit[j]=0; 
02475       DSM0_HT_tp_Bit_J1[j]=0;
02476       DSM0_HT_Thr3_tp_Bit_J1[j]=0;
02477       DSM0_TP_tp_Bit_J1[j]=0;
02478       DSM0_HTTP_tp_Bit_J1[j]=0; 
02479       DSM0_HT_tp_Bit_J3[j]=0;
02480       DSM0_HT_Thr3_tp_Bit_J3[j]=0;
02481       DSM0_TP_tp_Bit_J3[j]=0;
02482       DSM0_HTTP_tp_Bit_J3[j]=0;      
02483     }
02484   
02485     //Get array of TPid# from DSM module#
02486     mDecoder->GetTriggerPatchesFromDSM(i,DSM_TP);
02487 
02488 #ifdef DEBUG
02489     // Overwrite input to BEMC layer 0 DSMs (output of BEMC FEEs)
02490     // with content of trigger bank from MuDst (data only).
02491     // First fill the Layer0 histograms with results from FEEout()
02492     if (mHeadMaker->GetDataSet("MuDst")) {
02493       StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
02494       for (int triggerPatch = 0; triggerPatch < kNPatches; ++triggerPatch) {
02495         mBEMCLayer0HT6bit->Fill(triggerPatch,emcTrig.highTower(triggerPatch));
02496         mBEMCLayer0TP6bit->Fill(triggerPatch,emcTrig.patch(triggerPatch));
02497         mBEMCLayer0HT6bitDiff->Fill(triggerPatch,emcTrig.highTower(triggerPatch)-L0_HT_ADC[triggerPatch]);
02498         mBEMCLayer0TP6bitDiff->Fill(triggerPatch,emcTrig.patch(triggerPatch)-L0_TP_ADC[triggerPatch]);
02499         L0_HT_ADC[triggerPatch] = emcTrig.highTower(triggerPatch);
02500         L0_TP_ADC[triggerPatch] = emcTrig.patch(triggerPatch); 
02501       }
02502     }
02503 #endif
02504     
02505     
02506     //Loop over 10 inputs to each module 
02507     for (int j=0;j<kL0DsmInputs;j++){
02508       
02509       int tpid=DSM_TP[j];
02510       int jpid=-1;
02511       int seq=-1;
02512       mDecoder->GetJetPatchAndSequenceFromTriggerPatch(tpid, jpid, seq); 
02513 
02514       //Skip modules 2,7,12,17,22,27 
02515       if (i%5!=2) {
02516         
02517         //apply HT thresholds to each HT adc in each TP
02518         if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit[j]=0;
02519         if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit[j]=1;
02520         if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit[j]=2;
02521         if ((L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit[j]=3;
02522         if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) DSM0_HT_Thr3_tp_Bit[j]=1;
02523         if ( L0_HT_ADC[tpid]==63 ) DSM0_HT_tp_Bit[j]=0;
02524 
02525         //apply TP threshold to each TP adc in each TP
02526         if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit[j]=0;
02527         if ( L0_TP_ADC[tpid] >  mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit[j]=1;
02528         if ( L0_TP_ADC[tpid]==63 ) DSM0_TP_tp_Bit[j]=0;
02529 
02530         //add up TP adc for 2/5 of JP
02531         DSM0_TP_SUM[i]+=L0_TP_ADC[tpid];
02532 
02533         // AND HT#3 with TP bit
02534         DSM0_HTTP_tp_Bit[j]=(DSM0_TP_tp_Bit[j]&&DSM0_HT_Thr3_tp_Bit[j]);
02535         // Set HT#3 bit
02536         if (DSM0_HT_Thr3_Bit[i]<DSM0_HT_Thr3_tp_Bit[j]) DSM0_HT_Thr3_Bit[i]=DSM0_HT_Thr3_tp_Bit[j];
02537         // OR bits for HT thresholds #0,#1,#2
02538         if (DSM0_HT_Bit[i]<DSM0_HT_tp_Bit[j]) DSM0_HT_Bit[i]=DSM0_HT_tp_Bit[j];
02539         // OR bits for TP for all trigger patches                                                    
02540         if (DSM0_TP_Bit[i]<DSM0_TP_tp_Bit[j]) DSM0_TP_Bit[i]=DSM0_TP_tp_Bit[j];
02541         //OR bits for HTTP for all trigger patches
02542         if (DSM0_HTTP_Bit[i]<DSM0_HTTP_tp_Bit[j]) DSM0_HTTP_Bit[i]=DSM0_HTTP_tp_Bit[j];
02543       }
02544       
02545       //Loop over 2x5 inputs(TP) for modules 2,7,12,17,22,29
02546       if (i%5==2){
02547 
02548         if (j%2)
02549           {
02550             if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J3[j]=0;
02551             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J3[j]=1;
02552             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J3[j]=2;
02553             if ((L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit_J3[j]=3;
02554             if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) DSM0_HT_Thr3_tp_Bit_J3[j]=1;
02555             if ( L0_HT_ADC[tpid]==63 ) DSM0_HT_tp_Bit_J3[j]=0;
02556           }
02557         else
02558           {
02559             if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J1[j]=0;
02560             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J1[j]=1;
02561             if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J1[j]=2;
02562             if ((L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit_J1[j]=3;
02563             if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) DSM0_HT_Thr3_tp_Bit_J1[j]=1;
02564             if ( L0_HT_ADC[tpid]==63 ) DSM0_HT_tp_Bit_J1[j]=0;
02565           }
02566         
02567         //apply TP thresholds to each TP adc in each TP
02568         if (j%2)
02569           {
02570             if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J3[j]=0;
02571             if ( L0_TP_ADC[tpid] >  mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J3[j]=1;
02572             if ( L0_TP_ADC[tpid] == 63 ) DSM0_TP_tp_Bit_J3[j]=0;
02573           }                       
02574         else
02575           {
02576             if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J1[j]=0;
02577             if ( L0_TP_ADC[tpid] >  mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J1[j]=1;
02578             if ( L0_TP_ADC[tpid] == 63 ) DSM0_TP_tp_Bit_J1[j]=0;
02579           }
02580 
02581         //add up TP adc for 1/5 of JP
02582         if (j%2)
02583           DSM0_TP_SUM_J3[i]+=L0_TP_ADC[tpid];
02584         else
02585           DSM0_TP_SUM_J1[i]+=L0_TP_ADC[tpid];
02586                 
02587         
02588         //AND HT#3 with TP bit
02589         if (j%2) 
02590         {
02591           DSM0_HTTP_tp_Bit_J3[j]=(DSM0_TP_tp_Bit_J3[j] && DSM0_HT_Thr3_tp_Bit_J3[j]);
02592         }
02593         else
02594         {
02595           DSM0_HTTP_tp_Bit_J1[j]=(DSM0_TP_tp_Bit_J1[j] && DSM0_HT_Thr3_tp_Bit_J1[j]);
02596         }
02597 
02598         // OR bits for HT, TP, and HTTP for all trigger patches
02599         if (DSM0_HT_Bit_J3[i]<DSM0_HT_tp_Bit_J3[j]) DSM0_HT_Bit_J3[i]=DSM0_HT_tp_Bit_J3[j];
02600         if (DSM0_TP_Bit_J3[i]<DSM0_TP_tp_Bit_J3[j]) DSM0_TP_Bit_J3[i]=DSM0_TP_tp_Bit_J3[j];
02601         if (DSM0_HTTP_Bit_J3[i]<DSM0_HTTP_tp_Bit_J3[j]) DSM0_HTTP_Bit_J3[i]=DSM0_HTTP_tp_Bit_J3[j];
02602         if (DSM0_HT_Thr3_Bit_J3[i]<DSM0_HT_Thr3_tp_Bit_J3[j]) DSM0_HT_Thr3_Bit_J3[i]=DSM0_HT_Thr3_tp_Bit_J3[j];
02603 
02604         if (DSM0_HT_Bit_J1[i]<DSM0_HT_tp_Bit_J1[j]) DSM0_HT_Bit_J1[i]=DSM0_HT_tp_Bit_J1[j];
02605         if (DSM0_TP_Bit_J1[i]<DSM0_TP_tp_Bit_J1[j]) DSM0_TP_Bit_J1[i]=DSM0_TP_tp_Bit_J1[j];
02606         if (DSM0_HTTP_Bit_J1[i]<DSM0_HTTP_tp_Bit_J1[j]) DSM0_HTTP_Bit_J1[i]=DSM0_HTTP_tp_Bit_J1[j];
02607         if (DSM0_HT_Thr3_Bit_J1[i]<DSM0_HT_Thr3_tp_Bit_J1[j]) DSM0_HT_Thr3_Bit_J1[i]=DSM0_HT_Thr3_tp_Bit_J1[j];
02608 
02609       } 
02610     }
02611     
02612 
02613     if (i%5!=2)
02614       {
02615         L0_16bit_Out[k]=0;
02616         L0_16bit_Out[k++]=DSM0_TP_SUM[i]+(DSM0_HT_Bit[i]<<10)+(DSM0_HT_Thr3_Bit[i]<<12)+(DSM0_TP_Bit[i]<<13)+(DSM0_HTTP_Bit[i]<<14);
02617       }
02618     if (i%5==2)
02619       {
02620         L0_16bit_Out[k]=0;
02621         L0_16bit_Out[k++]=DSM0_TP_SUM_J3[i]+(DSM0_HT_Bit_J3[i]<<10)+(DSM0_HT_Thr3_Bit_J3[i]<<12)+(DSM0_TP_Bit_J3[i]<<13)+(DSM0_HTTP_Bit_J3[i]<<14);
02622         L0_16bit_Out[k++]=DSM0_TP_SUM_J1[i]+(DSM0_HT_Bit_J1[i]<<10)+(DSM0_HT_Thr3_Bit_J1[i]<<12)+(DSM0_TP_Bit_J1[i]<<13)+(DSM0_HTTP_Bit_J1[i]<<14);
02623       }
02624   }
02625 
02626 #ifdef DEBUG
02627 
02628   // Fill diagnostic histograms
02629   if (mHeadMaker->GetDataSet("MuDst")) {
02630     // BEMC layer 1 DSMs are stored in this order in the trigger bank:
02631     // BE101, BE102, BE103, BW101, BW102, BW103
02632     // DSM channels are read out in this order:
02633     static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
02634     // Trigger bank <-> Emulator ==> 0, 1, 2, 3, 4, 5 <-> 3, 4, 5, 0, 1, 2
02635     static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
02636     StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
02637 
02638     // Loop over BEMC layer 1 DSMs
02639     for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
02640       // Loop over layer 1 input channels
02641       for (int ch = 0; ch < kL1DsmInputs; ++ch) {
02642 
02643         Int_t idx = dsm*8+dsm_read_map[ch];
02644         Int_t TrigBankOut = emcTrig.bemcLayer1(idx);
02645         //bits 0-9
02646         Int_t TPSumout = (TrigBankOut & 0x3ff);
02647         Int_t TPSumbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x3ff);
02648         //bits 10-11
02649         Int_t HTout = (TrigBankOut & 0xc00)/0x400;
02650         Int_t HTbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc00)/0x400; 
02651         //bit 12
02652         Int_t HT3out = (TrigBankOut & 0x1000/0x800);
02653         Int_t HT3bits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x1000/0x800);
02654         //bit 13
02655         Int_t TPout = (TrigBankOut & 0x2000)/0x1000;
02656         Int_t TPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x2000)/0x1000;
02657         //bit 14
02658         Int_t HTTPout = (TrigBankOut & 0x4000)/0x2000;
02659         Int_t HTTPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x4000)/0x2000;
02660 
02661         int TPSumdiff = (TPSumbits)-(TPSumout);
02662         int HTdiff = (HTbits) - (HTout);
02663         int HT3diff = (HT3bits) - (HT3out);
02664         int TPdiff = (TPbits) - (TPout);
02665         int HTTPdiff = (HTTPbits) - (HTTPout);
02666         mBEMCLayer1PatchSum->Fill(dsm*6+ch, TPSumout);
02667         mBEMCLayer1HTBits->Fill(dsm*6+ch, HTout);
02668         mBEMCLayer1HTthr3Bits->Fill(dsm*6+ch,HT3out);
02669         mBEMCLayer1TPBits->Fill(dsm*6+ch, TPout);
02670         mBEMCLayer1HTTPBits->Fill(dsm*6+ch, HTTPout);
02671         mBEMCLayer1PatchSumDiff->Fill(dsm*6+ch, TPSumdiff);
02672         mBEMCLayer1HTBitsDiff->Fill(dsm*6+ch, HTdiff);
02673         mBEMCLayer1HTthr3Diff->Fill(dsm*6+ch, HT3diff);
02674         mBEMCLayer1TPBitsDiff->Fill(dsm*6+ch, TPdiff);
02675         mBEMCLayer1HTTPBitsDiff->Fill(dsm*6+ch, HTTPdiff);  
02676       }
02677     }
02678   }
02679 #endif
02680 
02681 }
02682 
02683 
02684 //==================================================
02685 //==================================================
02686 void StBemcTriggerSimu::get2008pp_DSMLayer1(){
02687 
02688 
02689   //DSM_Layer0 is passed to DSM_Layer1 in 8 UShort blocks (16 bits)
02690   //There are 6 DSM_Layer1 boards and each can take 120 bits total
02691   //So DSM_Layer0 passes 8 shorts (16*8=128) or 128 bits to each DSM_Layer1
02692 
02693   //Zero out the DSMLayer1 Bits passed to DSMLayer2
02694   for (int i=0;i<kL1DsmModule;i++){
02695     DSM1_JP_Bit[i]=0;
02696     DSM1_HTj0_Bit[i]=0;
02697     DSM1_HTj1_Bit[i]=0;
02698     DSM1_HT3_Bit[i]=0;
02699     DSM1_TP_Bit[i]=0;
02700     DSM1_HTTP_Bit[i]=0;
02701     DSM1_ETOT_ADC[i]=0;
02702   }
02703 
02704 
02705 #ifdef DEBUG
02706     // Overwrite input to BEMC layer 1 DSMs (output of BEMC layer 0 DSMs)
02707     // with content of trigger bank from MuDst (data only).
02708     if (mHeadMaker->GetDataSet("MuDst")) {
02709       static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
02710       static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
02711       StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
02712       for (int dsm = 0; dsm < 6; ++dsm) {
02713         int offset = TriggerBankToSimuMap[dsm]*5;
02714         DSM0_TP_SUM   [offset+0] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[0]) & 0x3ff;
02715         DSM0_TP_SUM   [offset+1] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[1]) & 0x3ff;
02716         DSM0_TP_SUM_J3[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[2]) & 0x1ff;
02717         DSM0_TP_SUM_J1[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[3]) & 0x1ff;
02718         DSM0_TP_SUM   [offset+3] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[4]) & 0x3ff;
02719         DSM0_TP_SUM   [offset+4] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[5]) & 0x3ff;
02720       }
02721     }
02722 #endif
02723     
02724   //Sum TP ADC into JP's
02725   // West
02726   DSM1_JP_ADC[0]=DSM0_TP_SUM[0]+DSM0_TP_SUM[1]+DSM0_TP_SUM_J3[2];
02727   DSM1_JP_ADC[1]=DSM0_TP_SUM[3]+DSM0_TP_SUM[4]+DSM0_TP_SUM_J1[2];
02728   DSM1_JP_ADC[2]=DSM0_TP_SUM[5]+DSM0_TP_SUM[6]+DSM0_TP_SUM_J3[7];
02729   DSM1_JP_ADC[3]=DSM0_TP_SUM[8]+DSM0_TP_SUM[9]+DSM0_TP_SUM_J1[7];
02730   DSM1_JP_ADC[4]=DSM0_TP_SUM[10]+DSM0_TP_SUM[11]+DSM0_TP_SUM_J3[12];
02731   DSM1_JP_ADC[5]=DSM0_TP_SUM[13]+DSM0_TP_SUM[14]+DSM0_TP_SUM_J1[12];
02732   
02733   // East
02734   DSM1_JP_ADC[6]=DSM0_TP_SUM[15]+DSM0_TP_SUM[16]+DSM0_TP_SUM_J1[17];
02735   DSM1_JP_ADC[7]=DSM0_TP_SUM[18]+DSM0_TP_SUM[19]+DSM0_TP_SUM_J3[17];
02736   DSM1_JP_ADC[8]=DSM0_TP_SUM[20]+DSM0_TP_SUM[21]+DSM0_TP_SUM_J1[22];
02737   DSM1_JP_ADC[9]=DSM0_TP_SUM[23]+DSM0_TP_SUM[24]+DSM0_TP_SUM_J3[22];
02738   DSM1_JP_ADC[10]=DSM0_TP_SUM[25]+DSM0_TP_SUM[26]+DSM0_TP_SUM_J1[27];
02739   DSM1_JP_ADC[11]=DSM0_TP_SUM[28]+DSM0_TP_SUM[29]+DSM0_TP_SUM_J3[27];
02740  
02741   for (int hh=0;hh<12;hh++) JP_adc_holder[hh]=DSM1_JP_ADC[hh];
02742   
02743   //Test each JP and see if it passed
02744   for (int i=0;i<kNJet;i++)
02745     {
02746       DSM1_JP_jp_Bit[i]=0;
02747       if ( DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,0)) DSM1_JP_jp_Bit[i]=0;
02748       if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,1)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,0))) DSM1_JP_jp_Bit[i]=1;
02749       if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,1))) DSM1_JP_jp_Bit[i]=2;
02750       if ( DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) DSM1_JP_jp_Bit[i]=3;
02751     }  
02752 
02753   
02754   int mod;
02755   //Translate JP's into 2 bits to pass to DSMLayer2
02756   for (int i=0;i<kNJet;i++){
02757     if (i < (kNJet/2)) mod = 0;
02758     else mod = 1;
02759     DSM1_ETOT_ADC[mod]+=DSM1_JP_ADC[i];
02760     if ( DSM1_JP_Bit[i/2] < DSM1_JP_jp_Bit[i]) DSM1_JP_Bit[i/2]=DSM1_JP_jp_Bit[i];   
02761   }
02762 
02763 
02764   //COMBINE HT3,TP0 and HTTP bits from all channels
02765   for (int i=0; i<kL1DsmModule; i++){
02766     for (int j=0; j<5; j++){
02767       int k= i*5 + j;
02768       int kk=i*5 + 2;
02769 
02770       if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit[k]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit[k];   
02771       if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J3[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J3[kk];   
02772       if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J1[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J1[kk];
02773 
02774       if ( DSM1_TP_Bit[i] < DSM0_TP_Bit[k]) DSM1_TP_Bit[i]=DSM0_TP_Bit[k];      
02775       if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J3[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J3[kk];   
02776       if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J1[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J1[kk];         
02777 
02778       if ( DSM1_HT3_Bit[i] < DSM0_HT_Thr3_Bit[k]) DSM1_HT3_Bit[i]=DSM0_HT_Thr3_Bit[k];      
02779       if ( DSM1_HT3_Bit[i] < DSM0_HT_Thr3_Bit_J3[kk]) DSM1_HT3_Bit[i]=DSM0_HT_Thr3_Bit_J3[kk];   
02780       if ( DSM1_HT3_Bit[i] < DSM0_HT_Thr3_Bit_J1[kk]) DSM1_HT3_Bit[i]=DSM0_HT_Thr3_Bit_J1[kk];         
02781 
02782     }
02783   }
02784 
02785 
02786   //WEST  HT bits
02787   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[0]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[0];
02788   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[1]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[1];
02789   if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit_J3[2]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit_J3[2];
02790   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit_J1[2]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit_J1[2];
02791   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[3]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[3];
02792   if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[4]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[4];
02793 
02794   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[5]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[5];
02795   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[6]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[6];
02796   if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit_J3[7]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit_J3[7];
02797   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit_J1[7]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit_J1[7];
02798   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[8]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[8];
02799   if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[9]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[9];
02800 
02801   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[10]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[10];
02802   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[11]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[11];
02803   if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit_J3[12]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit_J3[12];
02804   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit_J1[12]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit_J1[12];
02805   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[13]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[13];
02806   if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[14]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[14];
02807 
02808   //EAST HT bits
02809   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[15]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[15];
02810   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[16]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[16];
02811   if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit_J1[17]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit_J1[17];
02812   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit_J3[17]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit_J3[17];
02813   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[18]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[18];
02814   if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[19]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[19];
02815 
02816   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[20]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[20];
02817   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[21]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[21];
02818   if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit_J1[22]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit_J1[22];
02819   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit_J3[22]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit_J3[22];
02820   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[23]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[23];
02821   if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[24]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[24];
02822 
02823   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[25]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[25];
02824   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[26]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[26];
02825   if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit_J1[27]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit_J1[27];
02826   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit_J3[27]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit_J3[27];
02827   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[28]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[28];
02828   if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[29]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[29];
02829   
02830   
02831   //Drop two lowest bits for ETOT and OR Bits>6 with 6
02832   for (int i=0;i<kL1DsmModule;i++) {
02833     DSM1_ETOT_ADC[i]/=4;
02834     if (DSM1_ETOT_ADC[i]>31) DSM1_ETOT_ADC[i]=31;
02835   }
02836 
02837 
02838 #ifdef DEBUG
02839 
02840   if (mHeadMaker->GetDataSet("MuDst")) {
02841     StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
02842     static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
02843     static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
02844     for (int dsm = 0; dsm < kL2DsmModule; ++dsm) {
02845       for (int ch = 0; ch < 6; ++ch) {
02846         int idx = dsm_read_map[ch];
02847         int TrigBankOut = emcTrig.emcLayer2(idx);
02848         int jetPatch = 2 * TriggerBankToSimuMap[ch];
02849         int sum = DSM1_JP_ADC[jetPatch] + DSM1_JP_ADC[jetPatch+1];
02850         sum = (sum >> 7) ? 31 : (sum >> 2 & 0x1f);
02851         int diff = (TrigBankOut & 0x1f) - (sum & 0x1f);
02852         mBEMCLayer2PatchSum->Fill(ch, TrigBankOut & 0x1f);
02853         mBEMCLayer2PatchSumDiff->Fill(ch, diff);
02854         diff = (TrigBankOut >> 7 & 0x1) - (DSM1_HT3_Bit[TriggerBankToSimuMap[ch]]);
02855         mBEMCLayer2HT3Bits->Fill(ch, TrigBankOut >> 7 & 0x1);
02856         mBEMCLayer2HT3BitsDiff->Fill(ch,diff);
02857         diff = (TrigBankOut >> 8 & 0x1) - (DSM1_TP_Bit[TriggerBankToSimuMap[ch]]);
02858         mBEMCLayer2TPBits->Fill(ch, TrigBankOut >> 8 & 0x1);
02859         mBEMCLayer2TPBitsDiff->Fill(ch,diff);
02860         diff = (TrigBankOut >> 9 & 0x1) - (DSM1_HTTP_Bit[TriggerBankToSimuMap[ch]]);
02861         mBEMCLayer2HTTPBits->Fill(ch, TrigBankOut >> 9 & 0x1);
02862         mBEMCLayer2HTTPBitsDiff->Fill(ch,diff);
02863         diff = (TrigBankOut >> 10 & 0x3) - (DSM1_JP_Bit[TriggerBankToSimuMap[ch]]);
02864         mBEMCLayer2JPBits->Fill(ch, TrigBankOut >> 10 & 0x3);
02865         mBEMCLayer2JPBitsDiff->Fill(ch, diff);
02866         diff = (TrigBankOut >> 12 & 0x3) - (DSM1_HTj0_Bit[TriggerBankToSimuMap[ch]]);
02867         mBEMCLayer2HTj0Bits->Fill(ch, TrigBankOut >> 12 & 0x3);
02868         mBEMCLayer2HTj0BitsDiff->Fill(ch,diff);
02869         diff = (TrigBankOut >> 14 & 0x3) - (DSM1_HTj1_Bit[TriggerBankToSimuMap[ch]]);
02870         mBEMCLayer2HTj1Bits->Fill(ch, TrigBankOut >> 14 & 0x3);
02871         mBEMCLayer2HTj1BitsDiff->Fill(ch,diff);
02872  
02873       }
02874     }
02875   }
02876 #endif
02877 
02878 }
02879 
02880 void StBemcTriggerSimu::get2008pp_DSMLayer2()
02881 {
02882 
02883   // In hardware the final trigger decisions are made in the TCU 
02884   // It is not possible to compare the emulator with the TCU input
02885   // so all final trigger decisions for the BEMC are made at Layer2 
02886   // in this code
02887 
02888   Int_t DSM2_HT_Bit=0;
02889     
02890   for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
02891 
02892     if (DSM2_HT_Bit<DSM1_HTj0_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj0_Bit[dsm];
02893     if (DSM2_HT_Bit<DSM1_HTj1_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj1_Bit[dsm];
02894 
02895   }
02896   
02897   //HT0
02898   if (DSM2_HT_Bit > 0) mFiredTriggers.push_back(220500);
02899   //HT1
02900   if (DSM2_HT_Bit > 1) mFiredTriggers.push_back(220510);
02901   //HT2
02902   if (DSM2_HT_Bit > 2) mFiredTriggers.push_back(220520);
02903 
02904   
02905 }
02906 
02907 //==================================================
02908 
02909 void StBemcTriggerSimu::get2009_DSMLayer0()
02910 {
02911   // Loop over 30 modules
02912   for (int dsm = 0; dsm < kL0DsmModule; ++dsm) {
02913     TString line = (*mB001)[dsm].name + ": ";
02914     // Loop over 10 input channels to each module 
02915     for (int ch = 0 ; ch < kL0DsmInputs; ++ch) {
02916       int tpid = dsm*kL0DsmInputs+ch;
02917       (*mB001)[dsm].channels[ch] = L0_HT_ADC[tpid] | L0_TP_ADC[tpid] << 6;
02918       line += Form("%04x ",(*mB001)[dsm].channels[ch]);
02919     } // End loop over channels
02920     LOG_DEBUG << line << endm;
02921   } // End loop over modules
02922 
02923   // Emulate BEMC layer 0
02924   mB001->run();
02925 }
02926 
02927 //==================================================
02928 
02929 void StBemcTriggerSimu::get2009_DSMLayer1()
02930 {
02931   // Get input from BEMC layer 0
02932   mB001->write(*mB101);
02933 
02934   // LOG_DEBUG messages
02935   for (size_t dsm = 0; dsm < mB101->size(); ++dsm) {
02936     TString line = (*mB101)[dsm].name + ": ";
02937     for (int ch = 0; ch < 8; ++ch) line += Form("%04x ",(*mB101)[dsm].channels[ch]);
02938     LOG_DEBUG << line << endm;
02939   }
02940 
02941   // Emulate BEMC layer 1
02942   mB101->run();
02943 }
02944 
02945 //==================================================
02946 
02947 const vector< pair<int,int> > StBemcTriggerSimu::getTowersAboveThreshold(int trigId) const {  
02948   vector< pair<int,int> > towers;
02949   
02950   for (int i=0;i<kNTowers;i++)
02951     {
02952       int tpid = -1;
02953       int dsmid = -1;
02954       
02955       mDecoder->GetTriggerPatchFromTowerId(i,tpid);
02956       mDecoder->GetDSMFromTriggerPatch(tpid,dsmid);
02957 
02958       if (trigId==210500 || trigId==210501 || trigId==220500) {
02959         if (HT6bit_adc_holder[i] > mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,0)) {
02960           towers.push_back( make_pair(i+1,HT6bit_adc_holder[i]) );
02961         }
02962       }
02963       if (trigId==127611 || trigId==127821 || trigId==137821 || trigId==137822 || trigId==137611 || trigId==5 ||
02964           trigId==200601 || trigId==200602 || trigId==200213 || trigId==200214 || trigId==210510 || trigId==210511 ||
02965           trigId==220510) {
02966         if (HT6bit_adc_holder[i] > mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,1)) {
02967           towers.push_back( make_pair(i+1,HT6bit_adc_holder[i]) );
02968         }
02969       }
02970       if (trigId==127212 || trigId==137213 || trigId==200211 || trigId==200212 || trigId==200220 || trigId==200221 || 
02971           trigId==200222 || trigId==200620 || trigId==200621 || trigId==210520 || trigId==210521 || trigId==220520) {
02972         if (HT6bit_adc_holder[i] > mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,2)) {
02973           towers.push_back( make_pair(i+1,HT6bit_adc_holder[i]) );
02974         }
02975       }
02976       if (trigId==210541){
02977         if (HT6bit_adc_holder[i] > mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,4)) {
02978           towers.push_back( make_pair(i+1,HT6bit_adc_holder[i]) );
02979         }
02980       }
02981     }
02982   return towers;
02983 }
02984 
02985 
02986 const vector< pair<int,int> > StBemcTriggerSimu::getTriggerPatchesAboveThreshold(int trigId) const {  
02987   vector< pair<int,int> > patches;
02988 
02989   for (int i=0;i<kNPatches;i++)
02990     {
02991       int dsmid;
02992       mDecoder->GetDSMFromTriggerPatch(i,dsmid);
02993 
02994       if (trigId==127611 || trigId==127821 || trigId==137821 || trigId==137822 || trigId==137611 || trigId==5) {
02995         if (TP6bit_adc_holder[i] > mDbThres->GetTP_DSM0_threshold(dsmid,timestamp,1)) { 
02996           //cout << "In getTPAboveThreshold: " << i+1 << "\tTP: " << TP6bit_adc_holder[i] <<" dsmid"<<dsmid<<" tpid="<<i<< endl;
02997           patches.push_back( make_pair(i,TP6bit_adc_holder[i]) );
02998         }
02999       }
03000     }
03001   return patches;
03002 }
03003 
03004 
03005 const vector< pair<int,int> > StBemcTriggerSimu::getJetPatchesAboveThreshold(int trigId) const {  
03006   vector< pair<int,int> > patches;
03007   
03008   for (int i=0;i<kNJet;i++)
03009     {
03010       if ((JP_adc_holder[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,1)) && (JP_adc_holder[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,0))) {
03011         if (trigId==127501 || trigId==137501 || trigId==127622 || trigId==137622) {
03012           patches.push_back( make_pair(i,JP_adc_holder[i]) );
03013         }
03014       }
03015       if (JP_adc_holder[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,1)) {
03016         if (trigId==127221 || trigId==137221 || trigId==137222 || trigId==127501 || trigId==137501 || trigId==127622 || trigId==137622) {
03017           patches.push_back( make_pair(i,JP_adc_holder[i]) );
03018         }
03019       }
03020     }
03021   return patches;
03022 }
03023 
03024 
03025 int StBemcTriggerSimu::getTowerThreshold(int trigId, int dsmid) const {  
03026   int threshold =-1;
03027 
03028   if (trigId==127611 || trigId==127821 || trigId==137821 || trigId==137822 || trigId==137611 || trigId==5) {
03029     threshold = mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,1);
03030   }
03031   if (trigId==127212 || trigId==137213) {
03032     threshold = mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,2);
03033   }
03034 
03035   return threshold;
03036 }
03037 
03038 
03039 int StBemcTriggerSimu::getTriggerPatchThreshold(int trigId, int dsmid) const {
03040   int threshold = -1;
03041 
03042   if (trigId==127611 || trigId==127821 || trigId==137821 || trigId==137822 || trigId==137611 || trigId==5) {
03043     threshold = mDbThres->GetTP_DSM0_threshold(dsmid,timestamp,1);
03044   }
03045   return threshold;
03046 }
03047 
03048 
03049 int StBemcTriggerSimu::getJetPatchThreshold(int trigId, int dsmid) const {  
03050   int threshold = -1;
03051 
03052   if (trigId==127501 || trigId==137501 || trigId==127622 || trigId==137622) {  
03053     threshold = mDbThres->GetJP_DSM1_threshold(dsmid,timestamp,0);
03054   }
03055   if (trigId==127221 || trigId==137221 || trigId==137222) {
03056     threshold = mDbThres->GetJP_DSM1_threshold(dsmid,timestamp,1);
03057   }
03058   
03059   return threshold;
03060 }
03061 
03062 
03063 int StBemcTriggerSimu::barrelJetPatchTh(int i) const { return mB101->getRegister(i); }
03064 int StBemcTriggerSimu::barrelHighTowerTh(int i) const { return mB001->getRegister(i); }
03065 int StBemcTriggerSimu::barrelJetPatchAdc(int jp) const { return (*mB101)[jp%6].info[(jp/6+2)%3]; }
03066 
03067 void StBemcTriggerSimu::fillStEmcTriggerDetector()
03068 {
03069   if (StMuDst::event()) {
03070     StEmcTriggerDetector& emc = StMuDst::event()->emcTriggerDetector();
03071     for (int triggerPatch = 0; triggerPatch < kNPatches; ++triggerPatch) {
03072       emc.setHighTower(triggerPatch,getBEMC_FEE_HT_ADC()[triggerPatch]);
03073       emc.setPatch(triggerPatch,getBEMC_FEE_TP_ADC()[triggerPatch]);
03074     }
03075   }
03076 }