00001 #ifndef _SECTOR_H
00002 #define _SECTOR_H
00003
00004
00005
00006 #define SB_RB_NUM 12
00007
00008
00009 #define RB_MZ_NUM 3
00010 #define RB_FIBER_HDR_LEN 64
00011
00012
00013 #define MZ_ASIC_NUM 6
00014 #define MZ_BUFFER_NUM 12
00015
00016
00017
00018 #define MZ_TPC_PADS_PER_ASIC 64
00019 #define MZ_TPC_TIMEBINS 512
00020 #define MZ_TPC_CPP_PER_PAD 32
00021 #define MZ_TPC_MAX_PADS_PER_MEZ (MZ_TPC_PADS_PER_ASIC*MZ_ASIC_NUM)
00022
00023 #define MZ_FTP_PADS_PER_ASIC 64
00024 #define MZ_FTP_TIMEBINS 512 // deal with this in software
00025 #define MZ_FTP_CPP_PER_PAD 32
00026 #define MZ_FTP_MAX_PADS_PER_MEZ (MZ_TPC_PADS_PER_ASIC*MZ_ASIC_NUM)
00027 #define MZ_FTP_PADS_PER_MEZ 320
00028
00029 #define MZ_SVT_PADS_PER_ASIC 256
00030 #define MZ_SVT_TIMEBINS 128
00031 #define MZ_SVT_CPP_PER_PAD 8
00032 #define MZ_SVT_MAX_PADS_PER_MEZ (MZ_SVT_PADS_PER_ASIC*MZ_ASIC_NUM) // not really verified
00033
00034
00035 #define MZ_MAX_PADS_PER_ASIC 256 // SVT case
00036 #define MZ_MAX_TIMEBINS 512 // TPC
00037 #define MZ_MAX_CPP_PER_PAD 32 // TPC
00038 #define MZ_MAX_PADS (256*MZ_ASIC_NUM) // SVT
00039 #define MZ_MAX_CHANNELS (512*64*MZ_ASIC_NUM) // all
00040 #define MZ_MAX_CPPS (8*256*MZ_ASIC_NUM) // all
00041 #define MZ_MAX_ROWS 6 // TPC, SVT
00042
00043 #define MZ_MAX_CLUSTERS 6000
00044
00045 #define MZ_RAW_DEBUG_BYTES (0x40000 + 0x10000) // ADC and CPP
00046
00047
00048
00049 #define DMA_SL3_TYPE (1 << 28)
00050 #define DMA_FMT_TYPE (2 << 28)
00051
00052
00053
00054 #endif