#include "C:\LW\INCLUDE\analysis.h" #include "C:\LW\INCLUDE\formatio.h" #include "C:\LW\INCLUDE\lwsystem.h" #include "C:\LW\INCLUDE\userint.h" #include "C:\LW\INCLUDE\dataacq.h" /*________________________________________ FEE_P_G1.C as of 7/24/97 * Version 1.0 * SCA_Prd4.c provides a user interface to National Instrument's 5/19/94 * LabWindows on a IBM-PC clone. High-level Data Acquisition Library * functions calls are used to control LBL's new IC tester hardware. * Digital control and data acquisition is accomplished through a PC-DIO-96 * Digital Board and analog data acquisition is accomplished through a * MIO-16H-25 Analog Board. * * This version of the IC Tester software is designed for LBL/BNL to * test production versions of the STAR project's 16-channel SCA chips. * Other variations of this software are designed to test 4-channel preamps, * 16-channel preamps, and 16-channel shaper-amp, and combined 16-channel * preamp/shaper-amp chips. * * The IC tester for the SCA chips is controlled through digital ports * 6..11 on the PC-DIO-96 board. Ports 6,7,8, and 11 are output only. * Writing to these output ports configures the IC tester for the desired * tests. Ports 9 and 10, on the PC-DIO-96 board. are used as a bi- * directional data bus. Digital SCA data are read through digital ports * 9 and 10. Handshaking isDISABLED * Electrical characteristics of the IC under test, are read from input * (ADC) channel 0 of the MIO-16H-25 Analog \Board. Channel 0 is configured * for differential double ended input, bipolar (-10 to +10 volts), a gain * of 1, and with no external conversion pulses or triggering. * * Revision History: * ----------------- * 1/10/94 Paul Barale Copied v1 of SCA_Wolf.c and modified for STAR * 2/09/94 Paul Barale Now using FEE_pro1.uir, FEE_PROD.H * 2/09/94 Paul Barale Now using SCA_PROD.DAT as test results file * 2/10/94 Paul Barale Added 'glitch_Num[NUM_CHAN]' to log glitches/chan * 2/11/94 Paul Barale Added 'result' variable * 2/14/94 Paul Barale Added saveTestData() routine to log test results * 2/15/94 Paul Barale Reset data arrays prior to data acquisition * 3/03/94 Paul Barale Modified code to open save file after chip test * is complete for each chip, log data, then close * save file * 3/11/94 Paul Barale Pedestal noise failure now go to bin 3, pedestal * glitch to bin 4, instead of visa-versa * 4/19/94 Paul Barale Copied SCA_PROD.C to SCA_PRD1.C to make executable * only version * 4/21/94 Paul Barale Copied SCA_PRD1.C to SCA_PRD2.C to clean up and * shrink program size - removing the following routines * which are not used: Comp_MemEnable, IncAddrCntr, * LogSCA, LogSCAo, RunDiagTest, SelectEvenChanels, * SelectOddChanels, SelSAsig, WriteJigMem, LogTestData, * and WriteHeader * 5/09/94 Paul Barale Added 4 DC tests to monitor DAC output vs CH0 input - * check for DAC long term drift - doesn't cause chip rejection * 5/11/94 Paul Barale Added save of cross talk cells / chan and max cross talk * value / chan * 5/12/94 Paul Barale Found error in firstCell array for cross talk measurement - * first cell for ch15 pusling was set to same as for ch14. * 5/13/94 Paul Barale Added read of ch0 input voltage to linearity routine, replace * use of nominal input voltage * 5/16/94 Paul Barale Modified RunDcTest routine to connect mux to ground after * finished with dc test - had been left to ch 0 input and was * affecting following measurements. * 5/19/94 Paul Barale Moved calculation transpose and inverted matrices from start * of program into RunLinearity routine to make use of measured * ch0 input voltage. * 5/23/94 Paul Barale Installed at BNL as SCA_PROD.C * * 3/18/96 Chinh Vu a) change linearity to test # 3 * b) sigma = sigma*(1000/gain) millivolts (not in ADC counts) * c) change SCA_LMT.DAT for new limits * 3/19/96 Chinh Vu Add function SCA_DataAcq() before call MeasurePedestal() * in noise test to get rid of noise step from T.B ~16 (???) * 3/20/96 Chinh Vu a) Add function JumpBit(), SelExtsignal() after * crosstalk() to check for jumping Bits. * b) Add function NewRampR() to calculate the new Ramp * resistance to have correct Gain . * 6/12/96 Chinh Vu a) Add function SCA_DataAcq() right after Power to Tester is ON * to get Rid of first Bad Data set this set of data alway higher * than the second set if power is not OFF (seem working) particular * on the Pentium . * b) On Sigma test ,when scan for Bad_Sigma_Cell ,first cell is 10 not 0 * c) Add array ChanMaxjump[NUM_CHAN],ChanNumJump[NUM_CHAN] in Globals.h * to store maximum jump per chan and Number of Jump per chan . * d) Change order of SaveTestData to match test panel . * 6/21/96 Chinh Vu a) run JumpBit at 3 voltages 4.75,5.00,5.25 v * * 9/11/96 Chinh Vu a) change slope calculation based on current gain (@90MHz &28.7K) * b) change Resistor table. * c) change gain equation for standard R by taking intercept away . * d) Add chipIDs scan on acse PROD_RUN to skip the RETURN key * * 2/13/97 Chinh Vu a) change sca_p_t6.c to Fee_p_t1.c for fee production test * b) Change function RunDCTest() to accept new kind of test * in fee Also change Fee_Plim.dat (from 12 to 14 ) * c) Add NUM_CHAN_B , NUM_SCA to Fee.H * d) Modify function MeasurePedestal () to calculate and save ped * and RMS noise on any number of SCA per FEE bd ( typical 2->4 ) * By repeat the same function NUM_SCA times (new_chan) * * 2/14/97 Chinh Vu a) Add RunCal() to calculate Sum of calibration pulse/chan * and Add MAX_CAL_SUM , MIN_CAL_SUM ,MAX_PUL_SUM , * MIN_PUL_SUM to FEE.H * * 2/21/97 Chinh Vu a) Add run GlitchBaseLine() to noise test * b) Add runCrosstalkFee() to pulse every single chan every * 32 TBs and calculate crosstalk on all Un-pulsed channels * after substract baseline switching of shift register * c) the runCrossTalkFee() can be modified to calculate the Gain * linearity (using sum of ~4 TBs of the pulse) by changing * the DAC1 value for every pulse levels. * * 7/11/97 Chinh Vu a) Modified (from FEE_P_T9.C) Function RunCal() to Run ~10 time ,each time * DAC0 value is change from -5v to -4v for FEE GAIN calculation * ( DAC0 is connected to SAS_VDC U77-10 ) * * 7/23/97 Chinh Vu a) Add the calculation of Cal linearity ( from Cal_min to cal_max ) * on Runcal() * * 3/18/98 Chinh Vu a) Add the calculation of percent fail of each test * * 10/7/98 Chinh Vu a) this MPI_P_G2.C is from FEE_P_G1.C . * * S/W Validation Results: * ----------------------- * 2/15/94 Paul Barale Ran program with a variety of known good and bad * SCA/ADCs - chips measured and data logged ok. * 9/11/96 Chinh Vu Ran program with a variety of known good and bad * SCA/ADCs - chips measured and data logged ok. */ /*+ _ INCLUDES _______________________________________________________________ * * Never modify the contents of the "SCA.Prod.h" include file. It is * generated by the User Interface Editor. */ #include "fee.h" /* Include file for Switched Capacitor Array Chip */ #include "fee_Pro1.h" /* Panel parameters from the User Interface Editor */ #include "ni_defs.h" /* Info specific to National Instrument's boards */ #include "globals.h" /* Global parameters */ static int start,sca; /* to calculate new_chan for data storage */ static int testDataOn; /* Controls generation of H/W test data */ static int row; /* give the box# to store data file */ static int glitch_Num[NUM_CHAN_B]; /* number of glitches in each channel */ /* static int ChanNumJump[NUM_CHAN_B]; */ /* static int chanCrsTlk[NUM_CHAN_B] ; */ /* static int chanMaxCtlk[NUM_CHAN_B] ; */ static int Num_tested_bd,State; static int Num_good ,Percent_good; static int Num_fail_dc ,Percent_fail_dc; static int Num_fail_cross ,Percent_fail_cross; static int Num_fail_lin ,Percent_fail_lin; static int Num_fail_noise ,Percent_fail_noise; static int Num_fail_glitch ,Percent_fail_glitch; static int Num_fail_visual ,Percent_fail_visual; static double PulseChanSum[NUM_CHAN_B] ; /* Sum (2TBs) of CrossTalk pulse/chan */ static double Cal_chan[12][NUM_CHAN_B]; /* Sum (4TBs) of Cal pulse value/chan */ static double Crosstalk_chan[NUM_CHAN_B][2]; /* maximum crosstalk value & value/chan */ static double CrossTalkTemp[NUM_CELLS][NUM_CHAN]; static double SCA[NUM_CELLS][NUM_CHAN]; /* SCA readout value */ static double SCAo[NUM_CELLS][NUM_CHAN]; /* Mean SCA Pedestal value */ static double sigmaSCAo[NUM_CELLS][NUM_CHAN]; /* Sigma of Pedestal value */ static double SCAo_chan [NUM_CHAN_B]; /* Mean Pedestal value/channel */ static double sigmaSCAo_chan[NUM_CHAN_B]; /* Sigma SCA Pedestal value/chan */ static double SCA_chan [NUM_CHAN_B]; /* Mean SCA value/channel */ static double sigmaSCA_chan[NUM_CHAN]; /* Sigma SCA value/chan */ static double voltSCA[11]; /* SCA voltage array */ static char result[100]; /* Variables for the overdetermined matrix equation "m = B x c" for a */ /* least squares estimate of the unknown linearity coefficients c, which */ /* are the offset and gain for each SCA channel. */ static double c[2][NUM_CHAN_B]; /* Unknown least squares const */ static double B[NUM_LIN][2]; /* Least squares input const. */ static double BT[2][NUM_LIN]; /* Transpose of matrix B */ static double BTB[2][2]; /* Matrix product BT x B */ static double invBTB[2][2]; /* Inverse of matrix BTB */ static double invBTB_BT[2][NUM_LIN]; /* Inverse of matrix BTB */ static double m[NUM_LIN][NUM_CHAN_B]; /* Measured linearity values */ static double fit[10][NUM_CHAN_B]; /* Least squares fit */ static double fitDiff[NUM_LIN][NUM_CHAN_B]; /* Diff. data - least sq. fit in ADC count */ static double Percent_fitDiff[NUM_LIN][NUM_CHAN_B]; /* Diff. data - least sq. fit in ADC count */ static double G[8][4] ; /* standard res table */ static double firstCell[NUM_CHAN]; /* First CrossTalk cell */ /*_ FUNCTION DECLARATIONS ________________________________________________ */ /*_ SCA FUNCTIONS _______________________________________________________*/ int ClearCounters(); /* Clear Counters and prepare for new event */ int CrossTalkValue(); /* Calculates single cross talk measure */ int GlitchValue(); /* Calculates single glitch measure */ int HitPanel_PRD( int ); /* Process events for Panel_PRD */ int HitPanel_SAW( int ); /* Process events for sawtooth Panel_SAW */ int JumpBit(); /* To check the Jumping Bit with Slow Ramp */ double LinearityValue(); /* Maximum deviation from a linear fit */ int MeasurePedestal(); /* Measure mean & sigma of pedestal samples */ int Mem_CompEnable(); /* Enable jig memory to computer transfers */ int NewRampR(); /* Calculate new R ramp value */ int ReadCrossTalk0(); /* Read baseline data for cross talk calc. */ int ReadCrossTalk(); /* Read cross talk data from test jig's mem. */ int ReadJigMem(); /* Read values from SCA test jig's memory */ int ReadSawtooth(); /* Read sawtooth data from test jig's memo */ int RunCal(); /* Run Calibration pulse Test on SAS */ int RunCrossTalkFee(); /* Run Cross Talk Functional SCA Test */ int RunCrossTalk(); /* Run Cross Talk Functional SCA Test */ int RunDcTest( int ); /* Run single DC test on SCA IC Tester */ int RunDcTests(); /* Run 16 DC tests on SCA IC Tester */ int RunFuncTest( int ); /* Run single Func test on SCA IC Tester */ int RunGlitchBaseline(); /* Run Glitch on Baseline test */ int RunLinearity(); /* Run Linearity test */ int RunParamTest( int ); /* Run single Param tests on SCA IC Tester */ int RunSawTooth(); /* Run Sawtooth Parametric SCA Test */ int RunSigmaPedestal(); /* Run Sigma of Pedestal test */ int SaveTestData(); /* Writes selected test parameters to file */ int SCA_DataAcq(); /* Causes the SCA chip to acquire data */ int SCA_MemEnable(); /* Enable SCA to jig memory transfers */ int SCA_MemTest(); /* Enable SCA Test Data to jig transfers */ int SelDCsig(); /* Select DC signal into SCA chip */ int SelDCsigOddEven(); /* Select DC signal into odd/even SCA cells */ int SelectAllChanels(); /* Select all 16 input channels of SCA chip */ int SelExtsig(); /* Select External signal into SCA chip */ int SelTriangSig(); /* Select triangular signal into SCA chip */ int Set_SCA_Volts(double); /* Sets DC level voltage to SCA inputs */ int SigmaPedestalValue(); /* Calculates single sigma measure */ int StartNewEvent(); /* Set SCA trigger high */ int StrobeData(); /* Store Data in SCA test jig's memory */ int TestJigStatus(); /* Read test jig status. Not 0 ==> ready */ int WalkingPulse(); /* Selects non-overlapping SCA input pulses */ /*_ COMMON FUNCTIONS ____________________________________________________*/ void Check_Err( int ); /* Display/clear errors WAIT/NO_WAIT */ int DIO_Clear(); /* Clear the PC-DIO-96 board's ports */ int DIO_Init(); /* Init PC-DIO-96 lower 6 ports output */ int Display_ADC_Port_0(); /* Display status of ADC port 0 */ int Get_Low_High_Limits( double [][3] ); void ReadParameters( int ); /* Read Parameters from a disk file */ void RingBell( int ); /* Ring computer bell "n" times */ int Set_PA_Volts( double ); /* Sets the PA power supply voltage */ double Sigma( double[], double );/* Compute the Standard Deviation */ void WriteParameters( int ); /* Write Parameters to disk file */ void main() { int analogBoardType; /* 6 for a MIO-16H-25 board */ int digitalBoardType; /* 12 for a PC-DIO-96 board */ int itemSelected; /* ID of control that caused the event */ int handleHit; /* For panel or menu bar event */ int numSpec; /* Used for reading/writing param file */ int fileNum; /* Extension of the current data output*/ /* file */ int testVal; /* counter used for init'ing data arrays*/ int cal_level; double cal_max,cal_min; errNum = 0; /* Initial value of error # */ Fmt( errStr, "" ); /* Initial value of error string */ errCount = 0; /* Initial value of error count */ testDataOn = 0; /* No test data is the default */ productionRun = TRUE; /* Production run is the default */ /* Open and display user panel */ errNum = OpenInterfaceManager(); Check_Err( WAIT ); Panel_PRD = LoadPanel( "FEE_pro1.uir", PRD ); if ( Panel_PRD < 0 ) { FmtOut("Unable to load the FEE_pro1.uir resource file.\n"); return; } errNum = DisplayPanel( Panel_PRD ); errNum = SetActivePanel( Panel_PRD ); Check_Err( WAIT ); Panel_SAW = LoadPanel( "FEE_pro1.uir", SAW ); if ( Panel_SAW < 0 ) { FmtOut("Unable to load the FEE_pro1.uir resource file.\n"); return; } /*_ INITIALIZATION ____________________________________________________ */ Fmt( paramFileName, "FEE_FILE.EXT" ); fileExists = GetFileInfo( paramFileName, &fileSize ); if ( fileExists ) { parameterFile = OpenFile( paramFileName, READ_ONLY, NO_TRUNC, ASCII ); numSpec = ScanFile( parameterFile, "%s>%i", &fileNum ); errNum = CloseFile( parameterFile ); } else { /* Initialize default parameters */ fileNum = 0; } Fmt( chipIDs, ""); Fmt( operatorName, "Fee_revE_JW" ); Fmt( dataFileName, "PRD_DATA\\MPI_FEE." ); Fmt( dataFileName, "%s[a]<%d", fileNum ); fileNum += 1; if ( fileNum > 999 ) fileNum = 0; parameterFile = OpenFile( paramFileName, WRITE_ONLY, TRUNCATE, ASCII ); numSpec = FmtFile( parameterFile, "%s<%i\n", fileNum ); /* Write file num */ errNum = CloseFile( parameterFile ); SetCtrlVal( Panel_PRD, PRD_CHIP_ID, chipIDs ); hwDebug = OFF; /* ON => leave power to IC tester on. */ hwSimulation = OFF; /* Sim ON required to test S/W without H/W */ if ( ! hwSimulation ) SetCtrlVal(Panel_PRD, PRD_OPERATOR_NAME, operatorName ); Fmt( softwareVersion, "v1.0" ); /* Set software version # */ Fmt( errorFileName , "SCA_ER00.TXT" ); Fmt( limitFileName , "MPI_pLIM.old" ); errorLogFile = OpenFile( errorFileName, WRITE_ONLY, APPEND, ASCII ); /* voltSCA array contains the DAC voltage settings necessary to a achieve the Cal voltage level from cal_min to cal_max */ cal_max = -3.900; /* to have Large Cal pulse */ cal_min = -4.700; /* to have Small Cal pulse */ for ( cal_level = 0 ; cal_level < 10 ; cal_level++) { /* to set equally space of cal_level voltage */ voltSCA[cal_level] = ( cal_max - (cal_max - cal_min)*cal_level/9 ); B[cal_level][1]= voltSCA[cal_level] ; /* Input voltage for Linearity Test */ } /* voltSCA[0] = -4.000; */ /* to have Large Cal pulse */ /* voltSCA[9] = -4.850; */ /* to have minimum Cal pulse */ voltSCA[10] = -4.950; /* to have pedestal reading */ B[0][0]=1.0; /* B[0][1]= -4.000; Input voltage for Linearity Test 0 */ B[1][0]=1.0; /* B[1][1]= -4.100; Input voltage for Linearity Test 1 */ B[2][0]=1.0; /* B[2][1]= -4.200; Input voltage for Linearity Test 2 */ B[3][0]=1.0; /* B[3][1]= -4.300; Input voltage for Linearity Test 3 */ B[4][0]=1.0; /* B[4][1]= -4.400; Input voltage for Linearity Test 4 */ B[5][0]=1.0; /* B[5][1]= -4.500; Input voltage for Linearity Test 5 */ B[6][0]=1.0; /* B[6][1]= -4.600; Input voltage for Linearity Test 6 */ B[7][0]=1.0; /* B[7][1]= -4.700; Input voltage for Linearity Test 7 */ B[8][0]=1.0; /* B[8][1]= -4.800; Input voltage for Linearity Test 8 */ B[9][0]=1.0; /* B[9][1]= -4.850; Input voltage for Linearity Test 9 */ linearityPopup = FALSE; /* Determines if the linearity chart is displayed */ breakOnFail = FALSE; /* Permits operator to adjust lower & upper bounds */ errNum = Init_DA_Brds( AIO_BD, &analogBoardType ); /* Halts any operations */ Check_Err( WAIT ); errNum = Init_DA_Brds( DIO_BD, &digitalBoardType ); /* Halts any operations */ Check_Err( WAIT ); errNum = Get_Low_High_Limits( boundsDC ); Check_Err( WAIT ); errNum = DIO_Init(); /* Init digital I/O ports */ Check_Err( WAIT ); errNum = DIO_Clear(); /* Clear PC-DIO-96 ports */ Check_Err( WAIT ); outp( PORT_7, 0x00 ); /* Turn Tester Power off */ outp( PORT_6, 0x03 ); /* allow counter to output data 9-14-93 */ outp(PORT_11, 0x00); /* Set bit 7 of Port 11 low to reset counter 9-14-93*/ /* modified this table for FEE crosstalk pulsing channel in order of */ /* chan 0,2,4,6,8,10,12,14,15,13,11,9,7,5,3,1 start chan 0 @ TB 29 */ /* and every 32 TB for subsequence channels 2/19/97 */ firstCell[0]=29; firstCell[1]=509; firstCell[2]=61; firstCell[3]=477; firstCell[4]=93; firstCell[5]=445; firstCell[6]=125; firstCell[7]=413; firstCell[8]=157; firstCell[9]=381; firstCell[10]=189; firstCell[11]=349; firstCell[12]=221; firstCell[13]=317; firstCell[14]=253; firstCell[15]=285; Num_tested_bd =0; Num_good =0; Num_fail_dc =0; Num_fail_cross =0; Num_fail_lin =0; Num_fail_noise =0; Num_fail_glitch =0; Num_fail_visual =0; quitTest = FALSE; /* TRUE when quit key is pressed */ /*_ Main Event Loop ______________________________________________________ */ while ( !quitTest ) { errNum = SetActiveCtrl( PRD_CHIP_ID ); errNum = GetUserEvent( WAIT, &handleHit, &itemSelected ); Check_Err( WAIT ); /* Clear all the data arrays each time through to avoid recording spurrious data */ for( testVal=0; testVal PulseChanSum[new_chan] )||( PulseChanSum[new_chan] >1800 )) { /* Breakpoint (); */ passedAllTests = FALSE; /* pulse size too small OR too big */ SetCtrlVal( Panel_PRD, PRD_CTLK_FAIL, ON ); SetCtrlVal( Panel_PRD, PRD_TEST_RESULT , "FAILED: Put IC into Box 2CSIZE" ); Fmt( result, "%s<%s", "2CSIZE" ); SetCtrlVal( Panel_PRD, PRD_CTLK_RUN, OFF ); return(0); } } else { cell1 = firstCell[pulseChan]; /* First cell where glitch expected */ /* for ( cell=cell1; cell<(cell1+NUM_CTLK_CELLS); cell++ ) */ for ( cell=cell1; cell<(cell1+2); cell++ ) start = 16*sca ; new_chan = chan + start; { if ( fabs( SCA[cell][chan]) > max_Ctlk_Counts ) { value += 1; /* Count occurences of excessive cross talk */ chanCrsTlk[new_chan] += 1; } if ( fabs( SCA[cell][chan]) > chanMaxCtlk[new_chan] ) { chanMaxCtlk[new_chan] = fabs( SCA[cell][chan]); } if ( chanCrsTlk[new_chan] > max_Bad_Ctlk_Cells ) { passedAllTests = FALSE; SetCtrlVal( Panel_PRD, PRD_CTLK_FAIL, ON ); SetCtrlVal( Panel_PRD, PRD_TEST_RESULT , "FAILED: Put IC into Box 2CROS" ); Fmt( result, "%s<%s", "2CROS" ); SetCtrlVal( Panel_PRD, PRD_CTLK_RUN, OFF ); /* Breakpoint (); */ return(0); /* too many big crosstalk per chan */ } } } } } return( value ); } /*_ Glitch Value ____________________________________________ * * Function GlitchValue counts excessive glitches. */ int GlitchValue() { int cell, chan; /* Loop indices */ int value,new_chan; errNum = 0; /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_NUM, errNum ); Fmt( errStr, "" ); /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_STR, errStr ); value = 0; for ( chan=0; chan max_Glitch_Counts ) { value += 1; /* Count total occurences of excessive glitchs */ glitch_Num[new_chan] += 1; /* keep track of glitches per chan */ } } /* Breakpoint (); */ } return( value ); } /*_ Linearity Value ________________________________________ * * Function LinearityValue returns maximum deviation from a * linear least squares fit. */ double LinearityValue( int chan ) { int i; /* Loop index */ double value; errNum = 0; /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_NUM, errNum ); Fmt( errStr, "" ); /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_STR, errStr ); value = 0; for ( i=0; i value ) value = fabs( fitDiff[i][chan] ); } return( value ); } /*_ Process "itemSelected" on Panel_PRD ______________________ * * Function HitPanel_PRD responds to the "itemSelected" on Panel_PRD. */ int HitPanel_PRD( itemSelected ) int itemSelected; { int numBytes; /* Number of bytes written */ int arrayIndex; switch ( itemSelected ) { /* case PRD_RUN_TEST: */ /* user pressed the RUN button */ case PRD_CHIP_ID: /* to RUN right after user scanned the chip ID */ errNum = GetCtrlVal( Panel_PRD, PRD_CHIP_ID, chipIDs ); /* make sure chip ID scanned or entered before doing anything! */ if( CompareStrings( chipIDs, 0, "", 0, 0 ) == 0 ) { SetCtrlVal( Panel_PRD, PRD_TEST_RESULT , "Please scan or type chip ID and RETURN" ); RingBell( 3 ); } /*initialize arrays used to record archived data*/ else { for( arrayIndex=0; arrayIndex 8)) /* 10/13/95 */ { errNum = errNum + 1; ChanNumJump[chan] = ChanNumJump[chan] + 1; if ( fabs(SCA[cell][chan]) > ChanMaxJump[chan] ) ChanMaxJump[chan] = SCA[cell][chan]; } else { SCA[cell][chan] = 0; } } } NumJumpCell = errNum ; } errNum = Set_PA_Volts( 5.00 ); /* reset power supply to 5.00v */ delay (1.0); /* allowed power to settle before the next test */ /* Breakpoint (); */ if (NumJumpCell > 4) /* stop at breakpoint if more than 10 cells had problem */ { passedCrossTalk = FALSE; passedAllTests = FALSE; SetCtrlVal(Panel_PRD, PRD_CTLK_FAIL, ON ); SetCtrlVal( Panel_PRD, PRD_TEST_RESULT , "FAILED: Put IC into Box 2" ); /* if ( V_sca == 4.85 ) { Fmt( result, "%s<%s", "2J1" ); } if ( V_sca == 5.00 ) { Fmt( result, "%s<%s", "2J2" ); } if ( V_sca == 5.15 ) */ Fmt( result, "%s<%s", "2J3" ); } SetCtrlVal( Panel_PRD, PRD_PERCENT, 100 ); SetCtrlVal( Panel_PRD, PRD_CTLK_RUN, OFF ); errNum = SelDCsig(); return(0); } /* 10/18/95 */ /*_ Measure Pedestal __________________________________________________ * * Function MeasurePedestal applies a zero input signal to an SCA chip * and measures the mean and sigma of the pedestal of each cell. */ int MeasurePedestal() { double diff; double f; double v2; int high; int cell, chan, samp; /* Loop indices */ int v; int complete,new_chan,data; errNum = 0; /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_NUM, errNum ); Fmt( errStr, "" ); /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_STR, errStr ); SetCtrlVal( Panel_PRD, PRD_PERCENT, 0 ); /* for ( sca = 0; sca< NUM_SCA ;sca++) { */ for ( chan=0; chan= FIRST_GOOD_CELL) { /* Skip spikes in first cells */ /* Sum of value/channel matrix */ start = 16*sca ; /* change storage chan to new chan */ new_chan = chan + start; SCAo_chan[new_chan] += SCAo[cell][chan]; /* Sum of value^2/channel matrix */ sigmaSCAo_chan[new_chan] += sigmaSCAo[cell][chan]; } } SCAo_chan[new_chan] /= (NUM_CELLS-FIRST_GOOD_CELL); /* Calc mean/chan */ sigmaSCAo_chan[new_chan] /= (NUM_CELLS-FIRST_GOOD_CELL); /* Calc sigma/chan */ /* sigmaSCAo_chan[chan] = sigmaSCAo_chan[chan]*1000/c[1][chan] ; */ /* sigma/chan in milivolt */ sigmaSCAo_chan[new_chan] = sigmaSCAo_chan[new_chan]*1000/1000 ; /* sigma/chan in milivolt with gain = 425 count/v */ } /* Breakpoint (); */ /* to see storage data of each SCA */ errNum = RunGlitchBaseline(); /* fee add this test in RMS */ /* } */ return(0); } /*_ Memory to Computer Enable ______________________________________ * * Function Mem_CompEnable enables jig memory to computer transfers. */ int Mem_CompEnable() { int new, old; old = inp( PORT_6 ); /* Read port's old value */ new = (old & 0xFC) | 0x1; /* Set bits 1..0 to 0,1 */ outp(PORT_6, new); /* Enables jig memory to computer transfers */ return(0); } /* Calculate new R ramp value _______________________________________*/ int NewRampR() { char temp[40]; double gain,resistance; double slope,min,d_gain,intercept; int chan, i,R; /* Loop indices */ gain = 0; resistance = 0 ; intercept = 0; slope = 0; d_gain = 425; for ( chan=0; chan4090)) temp += 1; /* check if chan is bad 11-2-93*/ if (temp > 20) { passedCrossTalk = FALSE; passedAllTests = FALSE; SetCtrlVal(Panel_PRD, PRD_CTLK_FAIL, ON ); SetCtrlVal( Panel_PRD, PRD_TEST_RESULT , "FAILED: Put IC into Box 2" ); Fmt( result, "%s[a]<%s", "2C " ); cell = NUM_CELLS; chan = NUM_CHAN ; SetCtrlVal( Panel_PRD, PRD_CTLK_RUN, OFF ); return(0); } outp(PORT_8, 0x01); /* Inc Addr Cntr(Port 8 bit 0 high)*/ outp(PORT_8, 0x00); /* StrobeData (Port 8 bit 0 low) */ } } return(0); } /*_ Read Cross Talk Data _________________________________________ * * Function ReadCrossTalk reads the cross talk data from the Test * Jig's memory. */ int ReadCrossTalk() { double diff; double f; int cell, chan; /* Loop indices */ int v; int high; errNum = 0; /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_NUM, errNum ); Fmt( errStr, "" ); /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_STR, errStr ); /*-------------------------------------------- * Read values from the SCA Test Jig's memory */ outp(PORT_8, 0x01); /* Allow counter to be advanced by comp. */ Mem_CompEnable(); /* Enable Jig to Computer data transfers */ ClearCounters(); /* Set Port 11 bit 7 low */ StartNewEvent(); /* Set Port 11 bit 7 high */ outp(PORT_8, 0x00); /* Allow counter to be advanced by comp. */ for ( cell=0; cell SCA * */ int RunCal() { int temp,sca,chan,new_chan,cell; int sas,sas_sin,sas_sin1,sas_sin2,data; int row_num,setting,complete; /* for Gain calculation */ /*777*/ SetCtrlVal(Panel_PRD, PRD_LIN_RUN, ON ); SetCtrlVal( Panel_PRD, PRD_PERCENT, 0 ); for ( setting = 0; setting <12 ; setting++) /*777*/ { for ( chan = 0; chan<32 ;chan++) { Cal_chan[setting][chan] = 0; /* clear Cal_chan array */ } } for ( setting = 0; setting <11 ; setting++) /*777*/ { /*777*/ complete = 100/10*setting ; SetCtrlVal( Panel_PRD, PRD_PERCENT, complete ); Set_SCA_Volts( voltSCA[setting] ); /*777*/ /* Sets SAS_VDC */ /* Breakpoint (); */ for ( sca = 0; sca< NUM_SCA ;sca++) { if ((sca == 0 )||(sca == 2)) { sas_sin1=0x80; /* set SAS_SIN = LOW */ sas_sin2=0x88; /* set SAS_SIN = HIGH */ } else { if ((sca == 1 )||(sca == 3)) { sas_sin1=0x88; sas_sin2=0x80; } else { sas_sin1=0x88; sas_sin2=0x88; } } /* start clock in the selected SAS enable channels */ outp( PORT_6,0x03); /* enable Side A for clocking GATED_CK1 & CK2 */ /* outp( PORT_6,0x0B); */ /* enable card 0 for clocking GATED_CK1 & CK2 */ for (sas = 1;sas < 3 ;sas++) { for ( chan=0; chan 2100 )|| ( Cal_chan[setting][new_chan] < 700 )) { /* if ( ( Cal_chan[setting][new_chan] > MAX_CAL_SUM )|| ( Cal_chan[setting][new_chan] < MIN_CAL_SUM )) */ passedCrossTalk = FALSE; passedAllTests = FALSE; SetCtrlVal(Panel_PRD, PRD_LIN_FAIL, ON ); SetCtrlVal( Panel_PRD, PRD_PERCENT, 100 ); SetCtrlVal( Panel_PRD, PRD_TEST_RESULT , "FAILED: Put IC into Box 2CAL" ); Fmt( result, "%s<%s", "2CAL" ); return(0); } } } /* if ( setting == 0 ) Breakpoint (); */ } } /* to store Max & Min to row 10 & 11 */ /* 777 for ( chan=0; chan Cal_chan[10][chan] ) { Cal_chan[10][chan] = Cal_chan[setting][chan] ; } if(Cal_chan[setting][chan] < Cal_chan[11][chan] ) { Cal_chan[11][chan] = Cal_chan[setting][chan] ; } } } */ /* Breakpoint (); */ errNum = RunLinearity(); SetCtrlVal( Panel_PRD, PRD_PERCENT, 0 ); SetCtrlVal(Panel_PRD, PRD_LIN_RUN, OFF ); return(0); } /*_ RUN CROSS TALK TEST _____________________________________________________ * * Function RunCrossTalk runs the Functional Cross Talk test on the SCA chip. */ int RunCrossTalk() { /*_Run Cross Talk test ____________________________ */ int numBadCells; /* # Cells exceeding limit */ testName = 1; /* Functional test */ passedCrossTalk = TRUE; SetCtrlVal( Panel_PRD, PRD_CTLK_RUN, ON ); SetCtrlVal( Panel_PRD, PRD_PERCENT, 0 ); errNum = RunFuncTest( 3 ); /* Calculate un-pulsed baseline */ SetCtrlVal( Panel_PRD, PRD_PERCENT, 50 ); /* Breakpoint(); */ errNum = RunFuncTest( 0 ); /* Calculate pulsed Cross Talk - baseline */ /* Breakpoint(); */ Check_Err( WAIT ); numBadCells = CrossTalkValue(); /* Calculate # Cells exceeding limit */ /* Breakpoint(); */ if ( numBadCells > max_Bad_Ctlk_Cells ) { passedCrossTalk = FALSE; passedAllTests = FALSE; SetCtrlVal(Panel_PRD, PRD_CTLK_FAIL, ON ); SetCtrlVal( Panel_PRD, PRD_TEST_RESULT , "FAILED: Put IC into Box 2" ); Fmt( result, "%s<%s", "2C" ); } SetCtrlVal( Panel_PRD, PRD_PERCENT, 60 ); return(0); } /*_ RUN CROSS TALK FEE TEST _____________________________________________________ * * Function RunCrossTalkFee runs the Functional Cross Talk test on the SCA chip. */ int RunCrossTalkFee() { /*_Run Cross Talk test ____________________________ */ int turn,cell,chan; int numBadCells; /* # Cells exceeding limit */ passedCrossTalk = TRUE; SetCtrlVal( Panel_PRD, PRD_CTLK_RUN, ON ); SetCtrlVal( Panel_PRD, PRD_PERCENT, 0 ); for ( sca = 0; sca< NUM_SCA ;sca++) { Set_SCA_Volts( 0.00 ); /* Sets DC level voltage to inputs */ turn = -1; for ( turn = -1; turn <2 ;turn ++ ) { outp( PORT_7, 0x88); /* to clear input circuit shift register */ outp( PORT_6, 0x08); /* to read card 0 & set XILINX ready for new trigger */ outp( PORT_7, 0xA8); /* to enable input circuit shift register */ outp( PORT_8, 0x04); /* fee this enable memory clk of input circuit */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); /* errNum = ReadSelectSca(); */ if (turn == 0 ) { for ( cell=5; cell SCA_chan[chan])||(SCA_chan[chan] > 255)) { /* Breakpoint(); */ passedAllTests = FALSE; SetCtrlVal( Panel_PRD, PRD_CTLK_FAIL, ON ); SetCtrlVal( Panel_PRD, PRD_TEST_RESULT , "FAILED: Put IC into Box 2" ); Fmt( result, "%s<%s", "2PEDES" ); SetCtrlVal( Panel_PRD, PRD_CTLK_RUN, OFF ); /* Breakpoint(); */ return(0); /* any channels too low or too high pedestal */ } } } Set_SCA_Volts( 5.0 ); /* Sets DC level voltage to inputs */ } else { for ( cell=0; cell boundsDC[test][1]) || (boundsDC[test][1] > boundsDC[test][2])) && (test < 16 )) { passedAllTests = FALSE; SetCtrlVal( Panel_PRD, PRD_DC_FAIL, ON ); SetCtrlVal( Panel_PRD, PRD_TEST_RESULT , "FAILED: Put IC into Box 1" ); Fmt( result, "%s<%s", "1" ); test = 16; /* to stop the DC test */ } } SetCtrlVal( Panel_PRD, PRD_DC_RUN, OFF ); return(0); } /*_ RUN FUNC TEST ____________________________________________________ * * Function RunFuncTest runs a single Functional test on the SCA Chip. */ int RunFuncTest( testNum ) int testNum; { int cell, chan; /* Loop indices */ int pattern; /* Test pattern */ errNum = 0; /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_NUM, errNum ); Fmt( errStr, "" ); /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_STR, errStr ); switch ( testNum ) { case 0: /* Check cross talk between channels when injecting a non-overlapping */ /* in time pulses to all 16 channels. The graphical display shows */ /* the cross talk. */ errNum = WalkingPulse(); /* Non-overlapping pulses all channels */ errNum = SelDCsigOddEven(); /* Select DC signal inject into SCA */ Set_SCA_Volts( 5.00 ); /* Sets DC level voltage to SCA inputs */ outp( PORT_7, 0xA8); /* to enable input circuit shift register */ outp( PORT_8, 0x04); /* fee this enable memory clk of input circuit */ delay(1.0); errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ /* errNum = ReadCrossTalk(); */ /* data = 0x80 | sca ; */ /* set to read correspont SCA & keep power ON */ /* outp(PORT_7, data); */ /* outp(PORT_7, 0x80); */ errNum = ReadJigMem(); /* Breakpoint(); */ break; case 1: errNum = WalkingPulse(); /* Non-overlapping pulses all channels */ errNum = SelDCsigOddEven(); /* Select DC into odd/even SCA cells */ errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ Set_SCA_Volts( 1.84 ); /* Sets DC level voltage to SCA inputs */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); break; case 2: errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ errNum = SelDCsig(); /* Select DC signal inject into SCA */ Set_SCA_Volts( voltSCA[9] );/* Sets DC level voltage to SCA inputs */ /* 3/19/96 the following function SCA_DataAcq() is needed because for */ /* some reason if we run the Sigma test alone (case 2) then the */ /* noise is low ~the first 16 T.Bs then go up 4 times in the rest of T.B*/ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ delay (2.0); /* add in 5/16/94 to allow for electronic to stabilize */ errNum = MeasurePedestal(); break; case 3: /* Read baseline data with no pulsing for cross talk comparison. */ /* Same logic as case 0, except there is no Walking Pulse. */ /* errNum = SelDCsigOddEven();*/ /* Select DC signal inject into SCA */ /* P_T4 for some reason the next 2 statement is important --check what it does */ errNum = WalkingPulse(); /* Non-overlapping pulses all channels */ errNum = SelDCsigOddEven(); /* Select DC signal inject into SCA */ Set_SCA_Volts( 0.00 ); /* Sets DC level voltage to inputs */ outp( PORT_7, 0xA8); /* to enable input circuit shift register */ outp( PORT_8, 0x04); /* fee this enable memory clk of input circuit */ /* Breakpoint(); */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ /* errNum = ReadCrossTalk0(); */ /* outp(PORT_7, 0x80); */ errNum = ReadJigMem(); /* Breakpoint(); */ break; default: break; } return(0); } /*_ RUN GLITCHES ON BASELINE TEST _______________________________________________ * * Function RunGlitchBaseline runs the Glitches on Baseline test on the SCA chip. */ int RunGlitchBaseline() { /*_Run Glitches on Baseline ____________________________ */ int cell, chan; /* Loop indices */ int numBadCells; /* # Cells exceeding limit */ testName = 1; /* Functional test */ passedGlitchTest = TRUE; SetCtrlVal( Panel_PRD, PRD_GLITCH_RUN, ON ); SetCtrlVal( Panel_PRD, PRD_PERCENT, 0 ); numBadCells = GlitchValue(); /* Calculate # Cells exceeding limit */ if ( numBadCells > max_Bad_Glitch_Cells ) { passedGlitchTest = FALSE; passedAllTests = FALSE; SetCtrlVal(Panel_PRD, PRD_GLITCH_FAIL, ON ); SetCtrlVal( Panel_PRD, PRD_TEST_RESULT , "FAILED: Put IC into Box 5" ); State = 5; Fmt( result, "%s<%s", "5" ); } /* SetCtrlVal( Panel_PRD, PRD_PERCENT,100 ); */ SetCtrlVal( Panel_PRD, PRD_GLITCH_RUN, OFF ); return(0); } /*_ RUN LINEARITY TEST ___________________________________________ * * Function RunLinearity runs the Linearity tests on the SCA chip. */ int RunLinearity() { /*_ Run Linearity Tests _______________________________ */ char temp[40]; double gain,resistance; double slope,min,d_gain; int chan, i,R,row; /* Loop indices */ double linearityMeasure; /* # Cells exceeding limit */ testName = 1; /* Functional test */ passedLinearityTest = TRUE; SetCtrlVal( Panel_PRD, PRD_LIN_RUN, ON ); for ( i=0; i max_Linearity_Diff ) || ( c[1][chan] < min_Gain ) || ( c[1][chan] > max_Gain )) */ if (( linearityMeasure > 10 ) || ( c[1][chan] < 400 ) || ( c[1][chan] > 1500 )) { /* Breakpoint (); */ passedLinearityTest = FALSE; passedAllTests = FALSE; SetCtrlVal(Panel_PRD, PRD_LIN_FAIL, ON ); SetCtrlVal( Panel_PRD, PRD_TEST_RESULT, "FAILED: Put IC into Box 3" ); } } /* Breakpoint (); */ if( ! passedLinearityTest ) { Fmt( result, "%s<%s", "3" ); } SetCtrlVal( Panel_PRD, PRD_TEST_RESULT, temp ); SetCtrlVal( Panel_PRD, PRD_PERCENT,100 ); SetCtrlVal( Panel_PRD, PRD_LIN_RUN, OFF ); return(0); } /*_ RUN PARAM TEST ____________________________________________________ * * Function RunParamTest runs a single Parametric test on the SCA chip. */ int RunParamTest( testNum ) int testNum; { int complete; int i; double adcTotal; errNum = 0; /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_NUM, errNum ); Fmt( errStr, "" ); /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_STR, errStr ); complete = testNum * 10; SetCtrlVal( Panel_PRD, PRD_PERCENT, complete ); switch ( testNum ) { case 0: /* Linearity sample of all cells for DC voltage 3.4 */ errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ errNum = SelDCsig(); /* Select DC signal inject into SCA */ Set_SCA_Volts( voltSCA[0] ); /* Sets DC level voltage to SCA inputs */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); RunDcTest(11); /* Connect CH0 input to ADC input */ B[0][1] = dcTestResult; break; case 1: /* Linearity sample of all cells for DC voltage 3.2 */ errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ errNum = SelDCsig(); /* Select DC signal inject into SCA */ Set_SCA_Volts( voltSCA[1] ); /* Sets DC level voltage to SCA inputs */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); RunDcTest(11); /* Connect CH0 input to ADC input */ B[1][1] = dcTestResult; break; case 2: /* Linearity sample of all cells for DC voltage 3.2 */ errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ errNum = SelDCsig(); /* Select DC signal inject into SCA */ Set_SCA_Volts( voltSCA[2] ); /* Sets DC level voltage to SCA inputs */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); RunDcTest(11); /* Connect CH0 input to ADC input */ B[2][1] = dcTestResult; break; case 3: /* Linearity sample of all cells for DC voltage 2.8 */ errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ errNum = SelDCsig(); /* Select DC signal inject into SCA */ Set_SCA_Volts( voltSCA[3] ); /* Sets DC level voltage to SCA inputs */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); RunDcTest(11); /* Connect CH0 input to ADC input */ B[3][1] = dcTestResult; break; case 4: /* Linearity sample of all cells for DC voltage 2.6 */ errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ errNum = SelDCsig(); /* Select DC signal inject into SCA */ Set_SCA_Volts( voltSCA[4] ); /* Sets DC level voltage to SCA inputs */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); RunDcTest(11); /* Connect CH0 input to ADC input */ B[4][1] = dcTestResult; break; case 5: /* Linearity sample of all cells for DC voltage 2.4 */ errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ errNum = SelDCsig(); /* Select DC signal inject into SCA */ Set_SCA_Volts( voltSCA[5] ); /* Sets DC level voltage to SCA inputs */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); RunDcTest(11); /* Connect CH0 input to ADC input */ B[5][1] = dcTestResult; break; case 6: /* Linearity sample of all cells for DC voltage 2.2 */ errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ errNum = SelDCsig(); /* Select DC signal inject into SCA */ Set_SCA_Volts( voltSCA[6] ); /* Sets DC level voltage to SCA inputs */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); RunDcTest(11); /* Connect CH0 input to ADC input */ B[6][1] = dcTestResult; break; case 7: /* Linearity sample of all cells for DC voltage 2.0 */ errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ errNum = SelDCsig(); /* Select DC signal inject into SCA */ Set_SCA_Volts( voltSCA[7] ); /* Sets DC level voltage to SCA inputs */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); RunDcTest(11); /* Connect CH0 input to ADC input */ B[7][1] = dcTestResult; break; case 8: /* Linearity sample of all cells for DC voltage 1.8 */ errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ errNum = SelDCsig(); /* Select DC signal inject into SCA */ Set_SCA_Volts( voltSCA[8] ); /* Sets DC level voltage to SCA inputs */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); RunDcTest(11); /* Connect CH0 input to ADC input */ B[8][1] = dcTestResult; break; case 9: /* Linearity sample of all cells for DC voltage 1.6 */ errNum = SelectAllChanels(); /* Select all 16 channels of SCA */ errNum = SelDCsig(); /* Select DC signal inject into SCA */ Set_SCA_Volts( voltSCA[9] ); /* Sets DC level voltage to SCA inputs */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadJigMem(); RunDcTest(11); /* Connect CH0 input to ADC input */ B[9][1] = dcTestResult; break; case 10: /* Pulse all channels with a time varying sawtooth wave. The */ /* graphical display shows the cross talk. */ Set_SCA_Volts( voltSCA[5] ); /* Sets DC level voltage to SCA inputs */ /* errNum = SelectAllChanels(); */ /* Select all 16 channels of SCA */ /* errNum = SelTriangSig(); */ /* Select triangular signal into SCA */ errNum = SCA_DataAcq(); /* Move SCA chip data to jig memory */ errNum = ReadSawtooth(); break; default: break; } return(0); } /*_ RUN SAWTOOTH TEST ____________________________________________________ * * Function RunSawTooth runs one Sawtooth Parametric test on the SCA chip. */ int RunSawTooth() { /*_Run Sawtooth Parametric test ______________________________ */ testName = 2; /* Parametric test */ passedSawToothTest = TRUE; SetCtrlVal( Panel_PRD, PRD_SAW_RUN, ON ); errNum = RunParamTest( 10 ); /* Run Sawtooth test */ /* WARNING: Program control is interupted at this point. */ /* Subsequent program flow depends on which button ( e.g. */ /* "GOOD IC", "BAD IC", or "Home") the user selects from */ /* the Sawtooth Panel. */ return(0); } /*_ RUN SIGMA OF PEDESTAL TEST ______________________________________________ * * Function RunSigmaPedestal runs the Sigma of Pedestal test on the SCA chip. */ int RunSigmaPedestal() { /*_Run Sigma of Pedestal ____________________________ */ int numBadCells; /* # Cells exceeding limit */ int chan; testName = 1; /* Functional test */ passedSigmaPedestal = TRUE; SetCtrlVal( Panel_PRD, PRD_SIGMA_RUN, ON ); for ( chan=0; chan max_Bad_Sigma_Cells ) { passedSigmaPedestal = FALSE; passedAllTests = FALSE; SetCtrlVal(Panel_PRD, PRD_SIGMA_FAIL, ON ); SetCtrlVal( Panel_PRD, PRD_TEST_RESULT , "FAILED: Put IC into Box 4" ); Fmt( result, "%s<%s", "4" ); return(0); } } SetCtrlVal( Panel_PRD, PRD_PERCENT, 100 ); SetCtrlVal( Panel_PRD, PRD_SIGMA_RUN, OFF ); return(0); } /*_ Save Test Data _________________________________ * * Function SaveTestData writes selected test results from arrays to a disk file. */ int SaveTestData() { int testValue; int numBytes; char testData[4096]; dataLogFile = OpenFile( dataFileName, WRITE_ONLY, APPEND, ASCII ); Fmt( testData, "%s[w7]<%s\t", chipIDs ); Fmt( testData, "%s[a]<%s\t", datestr() ); Fmt( testData, "%s[w9a]<%s\t", timestr() ); Fmt( testData, "%s[a]<%s\t", result ); Fmt( testData, "%s[a]<%s\t", operatorName ); for( testValue=0; testValue error) */ Check_Err( WAIT ); return(0); } /*_ SCA Chip to Jig Memory Enable _________________________________ * * Function SCA_MemEnable enables SCA chip to jig memory transfers. */ int SCA_MemEnable() { int new, old; old = inp( PORT_6 ); /* Read port's old value */ new = (old & 0xFC) ; /* Set bits 1..0 to 1.1 */ outp( PORT_6, new ); /* Enables SCA chip to jig memory transfers */ return(0); } /*_ SCA Test Data to Jig Memory Enable _________________________________ * * Function SCA_MemTest enables SCA Test Data to jig memory transfers. */ int SCA_MemTest() { int new, old; old = inp( PORT_6 ); /* Read port's old value */ new = (old & 0xFC) | 0x3; /* Set bits 1..0 to 1,1 */ outp( PORT_6, new ); /* Enables SCA chip to jig memory transfers */ return(0); } /*_ Select DC Signal Into SCA Chip _______________________________ * * Function SelDCsig Selects DC signal into SCA chip. */ int SelDCsig() { int new, old; old = inp( PORT_6 ); /* Read port's old value */ new = (old & 0xF3) | 0x8; /* Set bits 3..2 to 1,0 */ outp( PORT_6, new ); /* Select DC signal into SCA chip */ return(0); } /*_ Select DC Signal Into Odd/Even SCA Cells _________________________ * * Function SelDCsigOddEven Selects DC signal into odd/even SCA cells. */ int SelDCsigOddEven() { int new, old; old = inp( PORT_6 ); /* Read port's old value */ new = (old & 0xF3) | 0xC; /* Set bits 3..2 to 1,1 */ outp( PORT_6, new ); /* Select DC signal into odd/even SCA cells */ return(0); } /*_ Select all 16 Input Channels of SCA Chip __________________________ * * Function SelectAllChanels selects all 16 input channels of SCA chip. */ int SelectAllChanels() { int new, old; old = inp( PORT_7 ); /* Read port's old value */ new = (old & 0xFC) | 0x03; /* Set bits 1..0 to 1,1 */ outp( PORT_7, new ); /* Select all 16 input channels of SCA chip */ return(0); } /*_ Select External Signal Into SCA Chip _______________________________ * * Function SelExtsig Selects External signal into SCA chip. */ int SelExtsig() { int new, old; old = inp( PORT_6 ); /* Read port's old value */ new = (old & 0xF3) | 0x4; /* Set bits 3..2 to 0,1 */ outp( PORT_6, new ); /* Select Ext signal into SCA chip */ return(0); } /*_ Select Triangular Signal into SCA Chip ____________________________ * * Function SelTriangSig selects a triangular signal into the SCA chip. */ int SelTriangSig() { outp( PORT_6, 0x00 ); /* Select triangular signal into the SCA */ return(0); } /*____________________________________ * * Sets DC level voltage to SCA inputs. */ int Set_SCA_Volts( DACvolts ) double DACvolts; { dacVolts = DACvolts; errNum = AO_VWrite( AIO_BD, CHAN_1, DACvolts ); if ( DACvolts > 0.1 ) delay( 0.5 ); /* Delay 0.5 seconds to let voltage stabilize */ if (errNum < 0) { Fmt( errStr, "%s", "Set_SCA_Volts()" ); return(-1); } return(0); } /*_ Sigma Pedestal Value _____________________________________________ * * Function SigmaPedestalValue counts excessive sigma pedestal values. */ int SigmaPedestalValue() { int cell, chan; /* Loop indices */ int value; errNum = 0; /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_NUM, errNum ); Fmt( errStr, "" ); /* Clear previous error indication */ SetCtrlVal( Panel_PRD, PRD_ERR_STR, errStr ); value = 0; for ( chan=0; chan max_Sigma_Counts ) value += 1; /* Count occurences of excessive cross talk */ } } return( value ); } /*_ Start New Event ______________________________________________ * * Function StartNewEvent sets the SCA trigger hign. This starts * the new event. */ int StartNewEvent() { outp(PORT_11, 0x80); /* Set bit 7 of Port 11 high */ return(0); } /*_ Strobe Data __________________________________________________ * * Function StrobeData sets the SCA trigger low. This clears all * counters on the test jig and prepares it for the new event. */ int StrobeData() { int old,new; old = inp(PORT_8); /* fee read port's old value */ new = (old&0x0E); /* fee set bit ..0 to zero */ outp(PORT_8,new) ; /* to allow address counter run */ /* outp(PORT_8, 0x00); */ /* Set bit 0 of Port 8 low */ return(0); } /*_ Test Jig Status ________________________________________________ * * Function TestJigStatus reads test jig status and re-tries until * either a non zero status is obtained or it times out. 0 ==> * ready. */ int TestJigStatus() { int iteration; /* Tries to get non-zero status */ int status; /* Status of the test jig. */ for ( iteration=0; iteration%*f[x]", numInDc, D ); /* Read DC Limit settings */ check = ScanFile( fileLimits, "%s>%i%i", &max_Ctlk_Counts, &max_Bad_Ctlk_Cells ); /* Read Crosstalk limits */ if( check != 2 ) { FmtOut ("Error reading crosstalk limits\n" ); exit(1); } check = ScanFile( fileLimits, "%s>%i%i", &max_Sigma_Counts, &max_Bad_Sigma_Cells ); /* Read Noise limits */ if( check != 2 ) { FmtOut ("Error reading noise limits\n" ); exit(1); } check = ScanFile( fileLimits, "%s>%i%i", &max_Glitch_Counts, &max_Bad_Glitch_Cells ); /* Read Glitch limits */ if( check != 2 ) { FmtOut ("Error reading glitch limits\n" ); exit(1); } check =ScanFile( fileLimits, "%s>%i", &max_Linearity_Diff ); /* Read Linearity Limit setting */ if( check != 1 ) { FmtOut ("Error reading linearity limit\n" ); exit(1); } check =ScanFile( fileLimits, "%s>%i%i", &min_Gain, &max_Gain ); /* Read Gain Limit settings */ if( check != 2 ) { FmtOut ("Error reading gain limits\n" ); exit(1); } CloseFile( fileLimits ); return(0); } /*_________________________________ * * Read Parameters from a disk file. */ void ReadParameters( int parameterFile ) { int numSpec; /* Number of format specifiers written */ numSpec = ScanFile( parameterFile, "%s>%s", chipIDs ); /* Read parameter */ numSpec = ScanFile( parameterFile, "%s>%s", operatorName ); /* Read parameter */ numSpec = ScanFile( parameterFile, "%s>%s", dataFileName ); /* Read parameter */ } /*______________________________ * * Ring computer bell "n" times. */ void RingBell( int n ) { int i; for ( i=0; i