1. Initialisation Script

The initialisation sript of the processor board of the Slow Control VME crate is the file : /star/tool/vxworks/boot/startup.cmd

Among other things, this script mounts two directories :

/control which refer to /star/tools/control

/epics which refer to /star/tools/epics/R3.12-LBL.4

At the end of this script, another script is called :


This script load all the necessary programs to run EPICS' real-time database. The lines which are specific to the SSD are the loading of the SSD programs :

ld < caen.o (load Caen hardware layer)

ld < recCaen.o (load Caen record support routines)

ld < jtagCommon.o (load JTAG common hardware layer)

ld < jtagCostar.o (load JTAG Costar chip hardware layer)

ld < jtagConnexion.o (load JTAG Connexion Board hardware layer)

ld < jtagReadout.o (load JTAG Readout Board hardware layer)

ld < jtagA128C.o (load JTAG Alice128C chip hardware layer)

ld < jbimain.o (load FPGA programming routines)

ld < recCostar.o (load Costar record support routines)

ld < recA128C.o (load Alice128C and Connexion Board record support routines)

ld < recReadoutFPGA.o (load Readout Board record support routines)

ld < pow_lad.o (load power supply finite state machine)

ld < ssd_1lad.o (load main finite state machine)


and the loading of the SSD databases :

dbLoadRecords "power_ladder0.db" (load power supply database)

dbLoadRecords "1ladder_readout.db" (load readout board database)

dbLoadRecords "ladder0N.db" (load N side ladder jtag database)

dbLoadRecords "ladder0P.db" (load P side ladder jtag database)


and also the starting of the Finite State Machines :

seq &pow_lad,"lad=0" (start power switching finite state machine)

seq &ssd_main (start main finite state machine)

dbpf "ssd_q1P_readout","OFF" (switch off readout board power supply)

2. Databases

a. Ladder Power Supply Database

 This database contains all the records related to power supply. For one ladder, there is 7 Caen records (+2V, -2V, +5V for P and N sides, and high voltage). There is also one binary output record used by the power supply finite state machine as an on/off switch. This database is described by the files : /star/tools/control/epics/R3.12-LBL.4/ssdApp/ssdDb/power_ladder0.db

This is a text file, where each record has the following format :

grecord(caen,"ssd_lad0N_p2v") (type and name of the record)


field(CRAT,"1") (number of caen crate)

field(BRD,"2") (number of board slot in the caen crate)

field(CHAN,"0") (number of channel in the board)

field(SCAN,"1 second") (the channel is read every second)

field(VSET,"2.2") (voltage set)

field(ISET,"2.5") (maximum current set)

field(RUP,"2") (ramp up in volts per second)

field(RDWN,"2") (ramp down in volts per second)


for more details about the different fields see the Caen Record Description

b. Ladder JTAG Database

This database contains all the records related to Alice128C, Costar and Connexion Boards FPGA chips. For each half-ladder there is 1 A128C record and 16 Costar records. For one ladder there is two files (one per side) describing the database :




In these text files the A128C record has the following format :

grecord(A128C,"ssd_lad0N_jtag") (type and name of the record)


field(LADR,"0") (ladder number)

field(ADRS,"0x3c") (l6 bits address, 4 lsb are connexion board address, 2 msb are readout board number)

field(OUTI,"ssd_lad0N_cost0.JINI PP NMS") (connect this record to one costar record)

field(BDIR,"/control/bias/") (directory of bias file)

field(BFIL,"default") (name of bias file)

field(BYPS,"111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111") (Alice128C chip bypass, chip marked with '0' will be bypassed)

field(CNXB,"1") (always "1", means there is a connexion board in the chain)

field(VREF,"0") (sensibility of latchup detection)

field(JCLK,"2000") (Jtag clock frequency, in Hertz)


and the Costar records have the following format:

grecord(costar,"ssd_lad0N_cost0") (type and name of the record)


field(LADR,"0") (ladder number)

field(SCAN,"2 second") (period of scanning)

field(FLNK,"ssd_lad0N_cost1 PP NMS") (connect this record to the next costar record)

field(REFV,"0.0") (pedestal compensation, value between -1.0 and 1.0)

field(VRN,"1.03") (the VRN, VRP, CFA and CFB parameters are given in the production database)




field(MUXM,"0") (don't touch these fields unless you know what you are doing)





At the end of the database files are two records :



field(SCAN,"2 second")

field(INPA,"ssd_lad0N_cost0.VAL NPP MS")

field(INPB,"ssd_lad0N_cost1.VAL NPP MS")

field(INPC,"ssd_lad0N_cost2.VAL NPP MS")

field(INPD,"ssd_lad0N_cost3.VAL NPP MS")

field(INPE,"ssd_lad0N_cost4.VAL NPP MS")

field(INPF,"ssd_lad0N_cost5.VAL NPP MS")

field(INPG,"ssd_lad0N_cost6.VAL NPP MS")

field(INPH,"ssd_lad0N_cost7.VAL NPP MS")

field(INPI,"ssd_lad0N_cost8.VAL NPP MS")

field(INPJ,"ssd_lad0N_cost9.VAL NPP MS")

field(INPK,"ssd_lad0N_cost10.VAL NPP MS")

field(INPL,"ssd_lad0N_cost11.VAL NPP MS")





field(SCAN,"2 second")

field(INPA,"ssd_lad0N_cost12.VAL NPP MS")

field(INPB,"ssd_lad0N_cost13.VAL NPP MS")

field(INPC,"ssd_lad0N_cost14.VAL NPP MS")

field(INPD,"ssd_lad0N_cost15.VAL NPP MS")

field(INPE,"ssd_lad0N_som.VAL NPP MS")



These two 'calc' records (there 2 records because this type of records is limited to 12 inputs, and we need 16) are used to calculate the average temperature of the Costars. You can note that the costars which are not working are removed from the sums (in this case the costar n° 4, 12, 14, 15) and the final sum is divided by the number of costars (11 in our case).


c. Readout Board Database

In this database there is all the switches of the main panel ('Start', 'Refresh', etc...). And there is also 2 Readout Board records.The file which define this database is :


In this file the format of the Readout Board record is :

grecord(ReadoutFPGA,"ssd_q1P_readout") (type and name of the record)


field(RDNB,"0") (Readout Board number, betwen 0 and 3)

field(FPNM,"rdo_1adc_1c2d2.jbc") (FPGA program file)

field(FPPT,"/control/bias/") (directory of the FPGA program file)

field(FLNK,"ssd_q1P_latchup PP MS") (connect to the 'latchup record')


3. Bias Files

The Alice128C chip need to be loaded with 'bias parameters' in order to work properly. By default, these parameters are stored in the directory : /star/tools/control/bias

In this directory, there are different type of files : 'chip files', 'bias files' and 'returned bias files', which are described below.

a. Chip Files

These files are text files with the extension .chip , they contain the 7 parameters necessary for one Alice128C chip. Each parameter is on a different line, and they are in this order : Ilvds, Ioutputbuff, Iinbuff, Vshaper, Ishaper, Vpreamp, Ipreamp.

Example : nominal.chip :









b. Bias Files

These files are text files with the extension .bias , they can have 2 forms : a list of chip files (without the extension), or a list of parameters (in this case the chip files are not used). In this file, each line represents one Alice128C chips. A typical bias file for one ladder (96 Alice128C chips) is :







(96 times)

in the first from, or :

20 100 50 91 60 153 100

20 100 50 91 60 153 100

20 100 50 91 60 153 100


20 100 50 91 60 153 100

(96 times)

in the second form.

Note : chip files names must not begin with a digit or the program will believe it is in the second form.

c. Returned Bias Files

These files are text files with the extension .ret , they are created by the A128C Record Support Routine and they contain the list of bias parameters returned by the Jtag protocol. These returned parameters should be the same as the one contained in the bias file, obviously. These files are named biasxx.ret where xx is the number of the ladder.