We currently have code in the Year 1 set-up which will mimic the ASIC operation in Year 2. The ASIC code is called AFTER the pedestal subtraction has been performed
How the ASIC works for the TPC.
The Year 1 StSvtSeqAdjMaker (great name huh!) code allows the user to set, at the macro level, the n_seq_hi, thresh_hi, thresh_lo, n_seq_lo levels. A sequence is accepted if
The timebuckets that pass n_seq_hi don't have to be continuous so the following hit will also pass.
The StSvtSeqAdjMaker code will allow us to decide what the optimum ASIC parameters should be. The BIG difference between the TPC and the SVT is that we may want to save more data in a sequence after thresh_lo has been passed on the longer drift side. This is because we want to try to save the undershoot for hits. The TPC electronics do not produce an undershoot so to date the ASIC code does not allow for this scenario. The ASIC algorithm will can not be changed, therefore the place to put the undershoot saving is in the i960 code, when the data is "event-built". It is easy to have the i960 save an additional x timebucket before or after the sequence pointers (although at the expense of bigger events). We (namely Jo!) are in control of this code for the SVT, so we are free to do what we feel necessary in the i960.
In Year 2 the SVT will use these parameters in the ASICs and perform its zero-suppresion on line.