ADC Outputs of Trigger Detectors

The following plots show simulated responses for the trigger multiplicity detectors, where each plot is one central event generated by FRITIOF. The CTB and MWC plots are raw ADC signals with the gain set for a Au + Au event. The level 0 plots represent the course pixel array passed from level 0 to level 1, and the vertical scale is calibrated to number of hits. The CTB plots are all eight bit outputs as are the level 0 plots. The MWC plots are ten bit outputs from the MWS module using charge integration. The bins represent either slats or sectors, or in the case of the level 0, sums of slats or sectors and the eta-phi representation is approximate. The level 0 output represents the level 0 course pixel array passed to level 1 processors and is not normalized in any way.

200 GeV Au + Au

200 GeV Si + Si

500 GeV p + p