TPC Level 3 Trigger - Technical Issues

Eleanor Judd, Space Sciences Laboratory and Pablo Yepes, Rice University

Last Update - December 9, 1995

This page describes, briefly, the technical issues that need to be studied for the TPC Level 3 trigger.

Cluster Finding Efficiency and resolution

Person Responsible: Eleanor Judd
Investigate cluster finding efficiency and space resolution vs:

Compare online and off-line cluster finders

Person Responsible: Eleanor Judd & Mike Lisa
Compare the performance of the on-line cluster finder with the off-line code.

Pointers setup in i960 for L3 tracking

Person Responsible: Michi Botlo & Pablo Yepes
Study how much of the setup needed for the tracking can be performed in parallel in the i960's.

ASIC Simulation

Person Responsible:Bill Christie, Eleanor Judd & Mike Lisa
Update the ASIC simulation in TSS:
  • dual-thresholds - currently just one threshold is used
  • 10-8 bit compression - not implemented at all
  • pedestal simulation - not implemented at all

Cluster finding Algorithms

Person Responsible:Michi Botlo et al.
Investigate other cluster finding algorithms:
  • Efficiency
  • Resolution
  • Timing

L3 tracking in multiple pp event environment

Person Responsible:Iwona Sakrejda (?) & Pablo Yepes

Particle Identification

Person Responsible:Eleanor Judd & Pablo Yepes
Investigate dE/dx vs:
  • # of padrows
  • Au-Au : xx : pp

Fast Tracking in L3 CPU

Person Responsible:Michi Botlo & Jo Schambach
Investigate tracking code timing on a real L3 environment.

i960 C code in TAS

Person Responsible:Eleanor Judd
The C code performing the cluster finding in the i960 processor should be integrated in TAS as a module.

Integrate fast tracking in TAS

Person Responsible:Pablo Yepes
The fast tracking program needs to be integrated in TAS as a analysis module.

Level3 Chain

Person Responsible:
Simulate the whole L3 "chain"
  • 24 processors with one sector/CPU
  • 1 processor combining the information from all of them