MiniDAQ VME crate: MiniDAQ's
VME crate holds five processors, a 32-MB memory card, two interrupt
modules (one is used only as an output register), a trigger card
(getting only power from the crate), etc. The VME backplane has been
hardwired such that module locations cannot necessarily be changed.
For example: the bus grant for the i960's is daisy-chained between the
i960's, so that their positions must be contiguous, with the leftmost
unit in a particular slot.
MiniDAQ processors: there are two MVME167 and three Cyclone
i960 processors. Booting and
IP numbers are discussed elsewhere.
Rosie receiver cards: Three
identical Cyclone i960 processors (scoter, wigeon and
gadwall) live in the MiniDAQ crate; each has two Rosie boards
protruding several inches from its front panel. The Rosie's are
numbered 1-6 globally, with the numbers usually, but not
necessarily, being the same as the readout board numbers.
The Cyclone processor software (which knows about only its own
Rosie's) refers to its upper and lower Rosie as ``Rosie 0'' and
``Rosie 1,'' respectively.
Trigger crate: most of the
resides in a standard NIM bin near the MiniDAQ VME crate.
Trigger card: the trigger card sends a 4-bit TTL pattern, set
through TTL Lemo inputs (by a VME interrupt module being used as an
output register) to the readout boards, when strobed by a TTL Lemo
trigger signal. Otherwise, it sends a 0000 (do nothing) pattern. The
two ribbon-cable outputs are interchangeable. Twisted-pair
trigger the RDO's. The cables must be installed with the small, molded
"Pin 1" triangles aligned with the similar triangles on the sockets
at both ends. (The triangle on each trigger card connector faces toward
the crate, obscuring visibility; the triangle on the cable connector
should also face toward the crate.
A single crystal on this card produces all clocks for the readout
boards; 9.4345 MHz is produced by dividing a standard 18.869 MHz
In MiniDAQ, the lasers and the ADC sampling clock are both free
running. (For that matter, the cosmics are free running, too.) The
laser sends a trigger signal, which sends the 0x04 command to the
readout boards. It's a very simple circuit. To a good approximation,
the trigger time is probably more-or-less smeared uniformly over one
clock period by this. It is not measured.
The laser trigger itself does not contribute significantly to the
smearing. It is created from a fast photodiode with ~2 ns rise
time. This signal comes to the laser trigger board, and a TTL signal
is sent to MiniDAQ with a total delay ~150-200 ns (including cables).
For RHIC running---The ADC sampling clock will be phase-locked
to the RHIC cycle, taking advantage of the fact that the accelerator
pulses are not free running. Spencer Klein notes that, for RHIC data
taken in the final configuration, laser events will also be
phase-locked to the RHIC strobe through a feedback loop that adjusts
when the Q-switch fires. Mikhail Aluyshin (MEPhI) is building this
circuitry. Until it is installed, the offset will may vary from event
Trigger synchronization module: New
triggers are disallowed in MiniDAQ until the previous one
has been processed, so the busy signals from all enabled Rosie's must
be OR'ed. Additionally, there is a small chance that a readout board
can miss a trigger, or be triggered by noise. The 6 toggle switches
have three positions:
- Up for enabled Rosies.
- Middle position is undefined and should never be used.
- Down for disabled Rosies.
The switch positions must exactly correspond to enabled/disabled states
of the Rosies set in MiniDAQ at configuration time.
Trigger clock (oscillator): The clock should be set at a few hertz -
fast enough for a small dead time between pedestal events, slow enough
that the 256-trigger timeout of the synchronization module doesn't come