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trgStructures2017.h
1 #ifndef trgStructures2017_h
2 #define trgStructures2017_h
3 /******
4 *
5 * Layout of new Trigger Data Block
6 *
7 * J.M. Nelson 30 January 2009
8 *
9 * Notes: The event descriptor will describe data from either
10 * the Mk1 or Mk2 TCUs. The variable TCU_Mark will be 1 for Mk1
11 * and 2 for the Mk2 TCU. Variables not used by one or other of the
12 * TCUs will be zero.
13 *
14 * The data block structure will always begin with a 4 character
15 * name, followed by the byte-count of data following. The structure of
16 * data will depend on the configuration of particular crates.
17 *
18 * Note: PrePost data will only be available on local trigger disks and
19 * will not be present in event files.
20 ******************************************************************************/
21 #define y17FORMAT_VERSION 0x16120844 /* Format: yymmddvv */
22 #define y17MAX_TRG_BLK_SIZE 122896 /* Current total: 113.25k bytes for pre/post non-zero suppressed data. Allow 120k */
23 #define y17MAX_OFFLEN 20 /* Depends on the number of crates in the system */
24 
25 #define y17L1_CONF_NUM 1
26 #define y17BC1_CONF_NUM 2
27 #define y17MXQ_CONF_NUM 3
28 #define y17MIX_CONF_NUM 4
29 #define y17BCW_CONF_NUM 5
30 #define y17BCE_CONF_NUM 6
31 #define y17EPQ_CONF_NUM 7
32 #define y17BBC_CONF_NUM 8
33 #define y17BBQ_CONF_NUM 9
34 #define y17FMS_CONF_NUM 10
35 #define y17QT1_CONF_NUM 11
36 #define y17QT2_CONF_NUM 12
37 #define y17QT3_CONF_NUM 13
38 #define y17QT4_CONF_NUM 14
39 #define y17FQ1_CONF_NUM 15
40 #define y17FQ2_CONF_NUM 16
41 
42 #define y17ADD_BIT_FORCE 5 /* Force store of this event */
43 #define y17ADD_BIT_L2_5 6 /* Level 2.5 abort */
44 #define y17ADD_BIT_SIM 7 /* Simulated event - used by DAQ */
45 
46 #define L2RESULTS_2017_OFFSET_EMC_CHECK 1
47 #define L2RESULTS_2017_OFFSET_EMC_PED 2
48 #define L2RESULTS_2017_OFFSET_BGAMMA 3
49 #define L2RESULTS_2017_OFFSET_EGAMMA 6
50 #define L2RESULTS_2017_OFFSET_DIJET 9
51 #define L2RESULTS_2017_OFFSET_UPSILON 17
52 #define L2RESULTS_2017_OFFSET_BEMCW 20
53 #define L2RESULTS_2017_OFFSET_BHIEN 42
54 #define L2RESULTS_2017_OFFSET_EHIEN 0
55 #define L2RESULTS_2017_OFFSET_BTOW_CAL 0
56 #define L2RESULTS_2017_OFFSET_ETOW_CAL 0
57 
58  /* Event Descriptor Data Structures */
59 
60 //#pragma pack(1)
61 
62 typedef struct {
63  char name[3]; /* Contains EVD */
64  char TrgDataFmtVer; /* Exception for use by DAQ (LS byte of FORMAT_VERSION) */
65  int length; /* Byte count of data that follows */
66  unsigned int bunchXing_hi;
67  unsigned int bunchXing_lo; /* Two parts of RHIC bunch crossing number */
68  unsigned short actionWdDetectorBitMask; /* from Fifo 1 */
69  unsigned char actionWdTrgCommand; /* from Fifo 1 */
70  unsigned char actionWdDaqCommand; /* from Fifo 1 */
71  unsigned short TrgToken; /* from Fifo 2 */
72  unsigned short addBits; /* used by trigger/daq: bit 5=Force store; bit 6=L2.5 abort; bit 7=1 is fake data */
73  unsigned short DSMInput; /* only for use with Mk1 TCU. 0 if Mk2 TCU is used */
74  unsigned short externalBusy; /* from Fifo 9 (Fifo 3 Mk1 TCU) */
75  unsigned short internalBusy; /* from Fifo 9 (Mk2 TCU) */
76 
77  unsigned short trgDetMask; /* was physicsWord */
78  unsigned short tcuCtrBunch_hi; /* was TriggerWord */
79 
80  unsigned short DSMAddress; /* from Fifo 10 (Fifo 6 Mk1 TCU) */
81  unsigned short TCU_Mark; /* TCU_Mark Mk1=1 Mk2=2 */
82  unsigned short npre; /* (crate_mask & 0xfff) << 4 | npre */
83  unsigned short npost; /* (crate_mask & 0xfff000)>>8| npost */
84  unsigned short res1; /* (crate_mask & 0xff000000)>>20 | res1&0xf */
86 
87 //#pragma pack()
88 
89  /* L1 DSM data structures */
90 
91 typedef struct {
92  char name[4]; /* Contains L1DS */
93  int length; /* Byte count of data that follows */
94  unsigned short TOF[8]; /* TOF and MTD data */
95  unsigned short VTX[8]; /* Separate VPD, ZDC and BBC DSMs have been replaced with this one */
96  unsigned short EMC[8]; /* Contents of 1 EMC IB - results of separate BEMC and EEMC DSMs */
97  unsigned short TPCMask[8]; /* TPC mask for DAQ10K */
98  unsigned short BCdata[16]; /* Contents of 2 Bunch Crossing DSMs IB's */
99  unsigned short specialTriggers[8]; /* Contents of 1 Special Trigger DSM - all the special trigger requests */
100  unsigned short FPD[8]; /* Contents of 1 FMS and FPD IB */
101  unsigned short lastDSM[8]; /* Contents of last DSM IB - results of all DSM trees */
103 
104  /* Trigger Summary Data Structures */
105 
106 typedef struct {
107  char name[4]; /* Contains TSUM */
108  int length; /* Byte count of data that follows */
109  unsigned int L1Sum[2]; /* L1 Summary */
110  unsigned int L2Sum[2]; /* L2 Summary */
111  unsigned int L1Result[32]; /* Result from L1 CPU */
112  unsigned int L2Result[64]; /* Result from L2 CPU */
113  unsigned int C2Result[64]; /* Result from last algorithm */
114  unsigned int LocalClocks[32]; /* localClock values from RCC2*/
116 
117 typedef struct {
118  char name[4];
119  int length; /* Byte count of data that follows */
120  unsigned int data[1]; /* NB: this definition is generic but would vary depending on actual data */
121 } DataBlock2017;
122 
123 typedef struct {
124  char name[4]; /* Contains BBC */
125  int length; /* Byte count of data that follows */
126  unsigned short BBClayer1[16]; /* This is the layer1 DSM that feeds the VTX DSM + EPD */
127  unsigned short ZDClayer1[8]; /* This is the new layer1 ZDC DSM that also feeds the VTX DSM */
128  unsigned short VPD[8]; /* ADC & TAC values for VPD detectors*/
129 } BBCBlock2017;
130 
131 typedef struct {
132  char name[4]; /* Contains MIX */
133  int length; /* Byte count of data that follows */
134  unsigned short FPDEastNSLayer1[8]; /* FPD east north/south layer 1 -> pp2pp */
135  unsigned char MTD_P2PLayer1[16]; /* Data from MTD and PP2PP */
136  unsigned short TOFLayer1[8]; /* This is TOF Layer 1 */
137  unsigned short TOF[48]; /* TOF data */
138  unsigned short TPCpreMask[24]; /* EMC, MTD, & TOF TPC Grid Masks -> HCAL */
139 } MIXBlock2017;
140 
141 typedef struct {
142  char name[4];
143  int length; /* Byte count of data that follows */
144  int dataLoss; /* Byte count of data truncated due to buffer limitations */
145  unsigned int data[1]; /* NB: this definition is generic but would vary depending on actual data */
146 } QTBlock2017;
147 
148 typedef struct {
149  char name[4];
150  int length;
151  unsigned char BEMCEast[240]; /* 15 DSMs covering the East half of BEMC */
153 
154 typedef struct {
155  char name[4];
156  int length;
157  unsigned char BEMCWest[240]; /* 15 DSMs covering the West half of BEMC */
159 
160 typedef struct {
161  char name[4];
162  int length;
163  unsigned short BEMClayer1[48]; /* 6 DSMs for BEMC at layer1 */
164  unsigned short EEMClayer1[16]; /* 2 DSMs for EEMC at layer1 */
165  unsigned char EEMC[144]; /* 9 DSMs for EEMC at layer0 */
167 
168 typedef struct {
169  char name[4];
170  int length;
171  unsigned char FMS[256]; /* 16 DSMs for FMS */
172 } FMSBlock2017;
173 
174 typedef struct {
175  int offset; /* Offset (in bytes) from the start of Trigger block to data */
176  int length; /* Length (in bytes) of data */
177 } TrgOfflen2017;
178 
179 typedef struct {
180  int FormatVersion; /* Trigger Data Definition Version yymmddvv */
181  int totalTriggerLength; /* Total length (bytes) of complete Trigger Block */
182  int eventNumber; /* Event number in this run */
183  TrgOfflen2017 EventDesc_ofl; /* Offset/length pair to Event Descriptor */
184  TrgOfflen2017 L1_DSM_ofl; /* Offset/length pair to L1 DSM Data */
185  TrgOfflen2017 Summary_ofl; /* Offset/length pair to Summary Data */
186  TrgOfflen2017 MainX[y17MAX_OFFLEN]; /* Offset/length pairs for main crossing */
187  int PrePostList[10]; /* Offsets to offset/length pairs to Pre and Post crossing */
188  int raw_data[y17MAX_TRG_BLK_SIZE/4]; /* Storage for raw data */
190 
191 #endif
192